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Searched refs:fcmp (Results 1 - 25 of 25) sorted by relevance

/third_party/node/deps/v8/src/diagnostics/loong64/
H A Ddisasm-loong64.cc834 Format(instr, "fcmp.caf.s fcc'cd, 'fj, 'fk"); in DecodeTypekOp12()
837 Format(instr, "fcmp.saf.s fcc'cd, 'fj, 'fk"); in DecodeTypekOp12()
840 Format(instr, "fcmp.clt.s fcc'cd, 'fj, 'fk"); in DecodeTypekOp12()
843 Format(instr, "fcmp.ceq.s fcc'cd, 'fj, 'fk"); in DecodeTypekOp12()
846 Format(instr, "fcmp.seq.s fcc'cd, 'fj, 'fk"); in DecodeTypekOp12()
849 Format(instr, "fcmp.cle.s fcc'cd, 'fj, 'fk"); in DecodeTypekOp12()
852 Format(instr, "fcmp.sle.s fcc'cd, 'fj, 'fk"); in DecodeTypekOp12()
855 Format(instr, "fcmp.cun.s fcc'cd, 'fj, 'fk"); in DecodeTypekOp12()
858 Format(instr, "fcmp.sun.s fcc'cd, 'fj, 'fk"); in DecodeTypekOp12()
861 Format(instr, "fcmp in DecodeTypekOp12()
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/crosstest/
H A Dtest_fcmp_main.cpp10 // Driver for cross testing the fcmp bitcode instruction
28 extern "C" bool fcmp##cmp##Float(float a, float b); \
29 extern "C" bool fcmp##cmp##Double(double a, double b); \
32 extern "C" v4si32 fcmp##cmp##Vector(v4f32 a, v4f32 b); \
82 {"fcmp" STR(cmp), Subzero_fcmp##cmp##Float, \
83 fcmp##cmp##Float, Subzero_fcmp##cmp##Double, \
84 fcmp##cmp##Double, Subzero_fcmpSelect##cmp##Float, \
165 #define X(cmp) {"fcmp" STR(cmp), Subzero_fcmp##cmp##Vector, fcmp##cmp##Vector},
/third_party/vixl/test/aarch64/
H A Dtest-disasm-fp-aarch64.cc192 COMPARE(fcmp(h0, h1), "fcmp h0, h1"); in TEST()
193 COMPARE(fcmp(h31, h30), "fcmp h31, h30"); in TEST()
194 COMPARE(fcmp(s0, s1), "fcmp s0, s1"); in TEST()
195 COMPARE(fcmp(s31, s30), "fcmp s31, s30"); in TEST()
196 COMPARE(fcmp(d0, d1), "fcmp d in TEST()
[all...]
H A Dtest-simulator-aarch64.cc2934 TEST(fcmp_d) { CALL_TEST_FP_HELPER(fcmp, d, Cmp, kInputDoubleBasic); } in TEST()
2935 TEST(fcmp_s) { CALL_TEST_FP_HELPER(fcmp, s, Cmp, kInputFloatBasic); } in TEST()
2936 TEST(fcmp_dz) { CALL_TEST_FP_HELPER(fcmp, dz, CmpZero, kInputDoubleBasic); } in TEST()
2937 TEST(fcmp_sz) { CALL_TEST_FP_HELPER(fcmp, sz, CmpZero, kInputFloatBasic); } in TEST()
H A Dtest-cpu-features-aarch64.cc543 TEST_FP(fcmp_0, fcmp(d0, 0.0))
544 TEST_FP(fcmp_1, fcmp(d0, d1))
545 TEST_FP(fcmp_2, fcmp(s0, 0.0))
546 TEST_FP(fcmp_3, fcmp(s0, s1))
3454 TEST_FP_FPHALF(fcmp_0, fcmp(h0, 0.0))
3455 TEST_FP_FPHALF(fcmp_1, fcmp(h0, h1))
H A Dtest-trace-aarch64.cc441 __ fcmp(d10, d24); in GenerateTestSequenceFP()
442 __ fcmp(d13, 0.0); in GenerateTestSequenceFP()
443 __ fcmp(s18, s6); in GenerateTestSequenceFP()
444 __ fcmp(s16, 0.0); in GenerateTestSequenceFP()
H A Dtest-assembler-sve-aarch64.cc17802 FCmpFn fcmp = is_absolute ? GetFpAbsCompareFn(cond) : GetFpCompareFn(cond);
17832 (masm.*fcmp)(pd_result_fp_1, p0.Zeroing(), zt_fp_1, zt_fp_2);
17835 (masm.*fcmp)(pd_result_fp_2, p0.Zeroing(), zt_fp_1, zt_fp_3);
17849 (masm.*fcmp)(pd_result_fp_3, p1.Zeroing(), zn_fp, zm_fp);
H A Dtest-assembler-fp-aarch64.cc1876 TEST(fcmp) { in TEST()
/third_party/ltp/tools/sparse/sparse-src/validation/
H A Dcond_expr3.c2 static int fcmp = 1 / (sizeof(int) - sizeof(1.0 == 2.0 - 1.0)); variable
/third_party/vixl/src/aarch64/
H A Dsimulator-aarch64.cc7408 fcmp(vf, rd, rn, rm, eq); in Simulator()
7411 fcmp(vf, rd, rn, rm, ge); in Simulator()
7414 fcmp(vf, rd, rn, rm, gt); in Simulator()
7641 fcmp(vf, rd, rn, rm, eq); in Simulator()
7644 fcmp(vf, rd, rn, rm, ge); in Simulator()
7650 fcmp(vf, rd, rn, rm, gt); in Simulator()
9001 fcmp(vf, rd, rn, rm, eq); in Simulator()
9004 fcmp(vf, rd, rn, rm, ge); in Simulator()
9007 fcmp(vf, rd, rn, rm, gt); in Simulator()
9108 fcmp(kFormat in Simulator()
[all...]
H A Dlogic-aarch64.cc5111 LogicVRegister Simulator::fcmp(VectorFormat vform,
5162 LogicVRegister Simulator::fcmp(VectorFormat vform,
5168 fcmp<SimFloat16>(vform, dst, src1, src2, cond);
5170 fcmp<float>(vform, dst, src1, src2, cond);
5173 fcmp<double>(vform, dst, src1, src2, cond);
5187 fcmp<SimFloat16>(vform, dst, src, zero_reg, cond);
5190 fcmp<float>(vform, dst, src, zero_reg, cond);
5194 fcmp<double>(vform, dst, src, zero_reg, cond);
5209 fcmp<SimFloat16>(vform, dst, abs_src1, abs_src2, cond);
5213 fcmp<floa
[all...]
H A Dsimulator-aarch64.h4583 LogicVRegister fcmp(VectorFormat vform,
4588 LogicVRegister fcmp(VectorFormat vform,
H A Dassembler-aarch64.h2351 void fcmp(const VRegister& vn, const VRegister& vm);
2354 void fcmp(const VRegister& vn, double value);
H A Dassembler-aarch64.cc3468 // Although the fcmp{e} instructions can strictly only take an immediate
3488 void Assembler::fcmp(const VRegister& vn, const VRegister& vm) {
3502 void Assembler::fcmp(const VRegister& vn, double value) {
/third_party/node/deps/v8/src/codegen/arm64/
H A Dmacro-assembler-arm64-inl.h536 fcmp(fn, fm); in Fcmp()
545 fcmp(fn, tmp); in Fcmp()
547 fcmp(fn, value); in Fcmp()
H A Dassembler-arm64.h1688 void fcmp(const VRegister& vn, const VRegister& vm);
1691 void fcmp(const VRegister& vn, double value);
H A Dassembler-arm64.cc2693 void Assembler::fcmp(const VRegister& fn, const VRegister& fm) { in fcmp() function in v8::internal::Assembler
2698 void Assembler::fcmp(const VRegister& fn, double value) { in fcmp() function in v8::internal::Assembler
2700 // Although the fcmp instruction can strictly only take an immediate value of in fcmp()
/third_party/node/deps/v8/src/execution/arm64/
H A Dsimulator-logic-arm64.cc3397 LogicVRegister Simulator::fcmp(VectorFormat vform, LogicVRegister dst, in fcmp() function in v8::internal::Simulator
3432 LogicVRegister Simulator::fcmp(VectorFormat vform, LogicVRegister dst, in fcmp() function in v8::internal::Simulator
3436 fcmp<float>(vform, dst, src1, src2, cond); in fcmp()
3439 fcmp<double>(vform, dst, src1, src2, cond); in fcmp()
3450 fcmp<float>(vform, dst, src, zero_reg, cond); in fcmp_zero()
3455 fcmp<double>(vform, dst, src, zero_reg, cond); in fcmp_zero()
3467 fcmp<float>(vform, dst, abs_src1, abs_src2, cond); in fabscmp()
3472 fcmp<double>(vform, dst, abs_src1, abs_src2, cond); in fabscmp()
H A Dsimulator-arm64.cc4254 fcmp(vf, rd, rn, rm, eq);
4257 fcmp(vf, rd, rn, rm, ge);
4260 fcmp(vf, rd, rn, rm, gt);
5518 fcmp(vf, rd, rn, rm, eq);
5521 fcmp(vf, rd, rn, rm, ge);
5524 fcmp(vf, rd, rn, rm, gt);
H A Dsimulator-arm64.h2100 LogicVRegister fcmp(VectorFormat vform, LogicVRegister dst,
2103 LogicVRegister fcmp(VectorFormat vform, LogicVRegister dst,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/AsmParser/
H A DLLLexer.cpp850 INSTKEYWORD(icmp, ICmp); INSTKEYWORD(fcmp, FCmp); in LexIdentifier()
/third_party/node/deps/v8/src/codegen/mips64/
H A Dassembler-mips64.h819 void fcmp(FPURegister src1, const double src2, FPUCondition cond);
H A Dassembler-mips64.cc3133 void Assembler::fcmp(FPURegister src1, const double src2, FPUCondition cond) { in fcmp() function in v8::internal::Assembler
/third_party/node/deps/v8/src/codegen/mips/
H A Dassembler-mips.h759 void fcmp(FPURegister src1, const double src2, FPUCondition cond);
H A Dassembler-mips.cc2927 void Assembler::fcmp(FPURegister src1, const double src2, FPUCondition cond) { in fcmp() function in v8::internal::Assembler

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