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Searched refs:dreg (Results 1 - 25 of 25) sorted by relevance

/third_party/node/deps/v8/src/execution/ppc/
H A Dsimulator-ppc.h178 void set_d_register_from_double(int dreg, const double dbl) { in set_d_register_from_double() argument
179 DCHECK(dreg >= 0 && dreg < kNumFPRs); in set_d_register_from_double()
180 *bit_cast<double*>(&fp_registers_[dreg]) = dbl; in set_d_register_from_double()
182 double get_double_from_d_register(int dreg) { in get_double_from_d_register() argument
183 DCHECK(dreg >= 0 && dreg < kNumFPRs); in get_double_from_d_register()
184 return *bit_cast<double*>(&fp_registers_[dreg]); in get_double_from_d_register()
186 void set_d_register(int dreg, int64_t value) { in set_d_register() argument
187 DCHECK(dreg > in set_d_register()
190 get_d_register(int dreg) get_d_register() argument
[all...]
/third_party/node/deps/v8/src/execution/arm/
H A Dsimulator-arm.h183 void set_dw_register(int dreg, const int* dbl);
186 void get_d_register(int dreg, uint64_t* value);
187 void set_d_register(int dreg, const uint64_t* value);
188 void get_d_register(int dreg, uint32_t* value);
189 void set_d_register(int dreg, const uint32_t* value);
199 void set_d_register_from_double(int dreg, const Float64 dbl) { in set_d_register_from_double() argument
200 SetVFPRegister<Float64, 2>(dreg, dbl); in set_d_register_from_double()
202 void set_d_register_from_double(int dreg, const double dbl) { in set_d_register_from_double() argument
203 SetVFPRegister<double, 2>(dreg, dbl); in set_d_register_from_double()
206 Float64 get_double_from_d_register(int dreg) { in get_double_from_d_register() argument
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H A Dsimulator-arm.cc787 void Simulator::set_dw_register(int dreg, const int* dbl) { in set_dw_register() argument
788 DCHECK((dreg >= 0) && (dreg < num_d_registers)); in set_dw_register()
789 registers_[dreg] = dbl[0]; in set_dw_register()
790 registers_[dreg + 1] = dbl[1]; in set_dw_register()
793 void Simulator::get_d_register(int dreg, uint64_t* value) { in get_d_register() argument
794 DCHECK((dreg >= 0) && (dreg < DwVfpRegister::SupportedRegisterCount())); in get_d_register()
795 memcpy(value, vfp_registers_ + dreg * 2, sizeof(*value)); in get_d_register()
798 void Simulator::set_d_register(int dreg, cons argument
803 get_d_register(int dreg, uint32_t* value) get_d_register() argument
808 set_d_register(int dreg, const uint32_t* value) set_d_register() argument
5872 uint64_t dreg; DecodeAdvancedSIMDLoadStoreSingleStructureToOneLane() local
5906 uint64_t dreg; DecodeAdvancedSIMDLoadStoreSingleStructureToOneLane() local
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/third_party/vixl/test/aarch32/
H A Dtest-utils-aarch32.cc145 const DRegister& dreg) { in Equal64()
146 return Equal64(expected, core, core->GetDRegisterBits(dreg.GetCode())); in Equal64()
236 const DRegister& dreg) { in EqualFP64()
238 uint64_t result = core->GetDRegisterBits(dreg.GetCode()); in EqualFP64()
143 Equal64(uint64_t expected, const RegisterDump* core, const DRegister& dreg) Equal64() argument
234 EqualFP64(double expected, const RegisterDump* core, const DRegister& dreg) EqualFP64() argument
H A Dtest-utils-aarch32.h191 const DRegister& dreg);
196 bool EqualFP32(float expected, const RegisterDump* core, const SRegister& dreg);
199 const DRegister& dreg);
/third_party/node/deps/v8/src/execution/arm64/
H A Dsimulator-arm64.cc589 args[i].double_value = dreg(num_fp_params++); in CallAnyCTypeFunction()
804 TraceSim("Arguments: %f, %f\n", dreg(0), dreg(1)); in DoRuntimeCall()
805 int64_t result = target(dreg(0), dreg(1)); in DoRuntimeCall()
819 TraceSim("Argument: %f\n", dreg(0)); in DoRuntimeCall()
820 double result = target(dreg(0)); in DoRuntimeCall()
834 TraceSim("Arguments: %f, %f\n", dreg(0), dreg(1)); in DoRuntimeCall()
835 double result = target(dreg( in DoRuntimeCall()
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H A Dsimulator-arm64.h1030 double dreg(unsigned code) const { return vreg<double>(code); } in dreg() function in v8::internal::Simulator
2459 return static_cast<T>(dreg(0)); in ReadReturn()
/third_party/node/deps/v8/src/execution/s390/
H A Dsimulator-s390.h146 T get_fpr(int dreg) { in get_fpr() argument
147 DCHECK(dreg >= 0 && dreg < kNumFPRs); in get_fpr()
148 return get_simd_register_by_lane<T>(dreg, 0); in get_fpr()
152 void set_fpr(int dreg, const T val) { in set_fpr() argument
153 DCHECK(dreg >= 0 && dreg < kNumFPRs); in set_fpr()
154 set_simd_register_by_lane<T>(dreg, 0, val); in set_fpr()
/third_party/ffmpeg/tests/checkasm/arm/
H A Dcheckasm.S119 .macro check_reg_vfp, dreg, offset
121 vmov r0, lr, \dreg
/third_party/vixl/test/aarch64/examples/
H A Dtest-examples.cc349 VIXL_CHECK(regs.dreg(0) == Add3DoubleC(A, B, C)); \
375 VIXL_CHECK(regs.dreg(0) == Add4DoubleC(A, B, C, D)); \
/third_party/vixl/test/aarch64/
H A Dtest-utils-aarch64.h157 inline double dreg(unsigned code) const { in dreg() function in vixl::aarch64::RegisterDump
H A Dtest-utils-aarch64.cc266 return EqualFP64(expected, core, core->dreg(fpreg.GetCode())); in EqualFP64()
/third_party/vixl/src/aarch32/
H A Dassembler-aarch32.cc4373 const DRegister& dreg = dreglist.GetFirstDRegister(); in fldmdbx() local
4375 EmitT32_32(0xed300b01U | (rn.GetCode() << 16) | dreg.Encode(22, 12) | in fldmdbx()
4386 const DRegister& dreg = dreglist.GetFirstDRegister(); in fldmdbx() local
4389 dreg.Encode(22, 12) | (len & 0xff)); in fldmdbx()
4407 const DRegister& dreg = dreglist.GetFirstDRegister(); in fldmiax() local
4410 (write_back.GetWriteBackUint32() << 21) | dreg.Encode(22, 12) | in fldmiax()
4421 const DRegister& dreg = dreglist.GetFirstDRegister(); in fldmiax() local
4424 (write_back.GetWriteBackUint32() << 21) | dreg.Encode(22, 12) | in fldmiax()
4444 const DRegister& dreg = dreglist.GetFirstDRegister(); in fstmdbx() local
4446 EmitT32_32(0xed200b01U | (rn.GetCode() << 16) | dreg in fstmdbx()
4457 const DRegister& dreg = dreglist.GetFirstDRegister(); fstmdbx() local
4478 const DRegister& dreg = dreglist.GetFirstDRegister(); fstmiax() local
4492 const DRegister& dreg = dreglist.GetFirstDRegister(); fstmiax() local
19412 const DRegister& dreg = dreglist.GetFirstDRegister(); vldm() local
19425 const DRegister& dreg = dreglist.GetFirstDRegister(); vldm() local
19483 const DRegister& dreg = dreglist.GetFirstDRegister(); vldmdb() local
19495 const DRegister& dreg = dreglist.GetFirstDRegister(); vldmdb() local
19549 const DRegister& dreg = dreglist.GetFirstDRegister(); vldmia() local
19562 const DRegister& dreg = dreglist.GetFirstDRegister(); vldmia() local
22454 const DRegister& dreg = dreglist.GetFirstDRegister(); vpop() local
22464 const DRegister& dreg = dreglist.GetFirstDRegister(); vpop() local
22505 const DRegister& dreg = dreglist.GetFirstDRegister(); vpush() local
22515 const DRegister& dreg = dreglist.GetFirstDRegister(); vpush() local
27088 const DRegister& dreg = dreglist.GetFirstDRegister(); vstm() local
27101 const DRegister& dreg = dreglist.GetFirstDRegister(); vstm() local
27159 const DRegister& dreg = dreglist.GetFirstDRegister(); vstmdb() local
27171 const DRegister& dreg = dreglist.GetFirstDRegister(); vstmdb() local
27225 const DRegister& dreg = dreglist.GetFirstDRegister(); vstmia() local
27238 const DRegister& dreg = dreglist.GetFirstDRegister(); vstmia() local
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/third_party/node/deps/v8/src/execution/loong64/
H A Dsimulator-loong64.h217 void set_dw_register(int dreg, const int* dbl);
/third_party/node/deps/v8/src/execution/mips64/
H A Dsimulator-mips64.h245 void set_dw_register(int dreg, const int* dbl);
/third_party/node/deps/v8/src/execution/mips/
H A Dsimulator-mips.h244 void set_dw_register(int dreg, const int* dbl);
/third_party/mesa3d/src/nouveau/codegen/
H A Dnv50_ir_from_tgsi.cpp3923 Value *dreg = getSSA(8); in handleInstruction() local
3926 mkOp2(OP_MERGE, TYPE_U64, dreg, src0, src1); in handleInstruction()
3927 Instruction *cvt = mkCvt(OP_CVT, dstTy, dst0[c], srcTy, dreg); in handleInstruction()
3954 Value *dreg = getSSA(8); in handleInstruction() local
3955 Instruction *cvt = mkCvt(OP_CVT, dstTy, dreg, srcTy, fetchSrc(0, c / 2)); in handleInstruction()
3958 mkSplit(&dst0[c], 4, dreg); in handleInstruction()
H A Dnv50_ir_lowering_nvc0.cpp1749 Value *dreg = bld.getSSA(typeSizeof(ty)); in handleCasExch() local
1751 bld.mkOp2(OP_MERGE, ty, dreg, cas->getSrc(1), cas->getSrc(2)); in handleCasExch()
1752 cas->setSrc(1, dreg); in handleCasExch()
1753 cas->setSrc(2, dreg); in handleCasExch()
/third_party/node/deps/v8/src/codegen/s390/
H A Dmacro-assembler-s390.cc665 DoubleRegister dreg = DoubleRegister::from_code(i); in MultiPushDoubles() local
667 StoreF64(dreg, MemOperand(location, stack_offset)); in MultiPushDoubles()
680 Simd128Register dreg = Simd128Register::from_code(i); in MultiPushV128() local
682 StoreV128(dreg, MemOperand(location, stack_offset), scratch); in MultiPushV128()
692 DoubleRegister dreg = DoubleRegister::from_code(i); in MultiPopDoubles() local
693 LoadF64(dreg, MemOperand(location, stack_offset)); in MultiPopDoubles()
706 Simd128Register dreg = Simd128Register::from_code(i); in MultiPopV128() local
707 LoadV128(dreg, MemOperand(location, stack_offset), scratch); in MultiPopV128()
/third_party/node/deps/v8/src/builtins/ppc/
H A Dbuiltins-ppc.cc3644 const DoubleRegister dreg = DoubleRegister::from_code(code); in Generate_DeoptimizationEntry() local
3646 __ stfd(dreg, MemOperand(sp, offset)); in Generate_DeoptimizationEntry()
3801 const DoubleRegister dreg = DoubleRegister::from_code(code); in Generate_DeoptimizationEntry() local
3803 __ lfd(dreg, MemOperand(r4, src_offset)); in Generate_DeoptimizationEntry()
/third_party/node/deps/v8/src/builtins/s390/
H A Dbuiltins-s390.cc3644 const DoubleRegister dreg = DoubleRegister::from_code(code); in Generate_DeoptimizationEntry() local
3646 __ StoreF64(dreg, MemOperand(sp, offset)); in Generate_DeoptimizationEntry()
3806 const DoubleRegister dreg = DoubleRegister::from_code(code); in Generate_DeoptimizationEntry() local
3808 __ ld(dreg, MemOperand(r3, src_offset)); in Generate_DeoptimizationEntry()
/third_party/node/deps/v8/src/codegen/ppc/
H A Dmacro-assembler-ppc.cc418 DoubleRegister dreg = DoubleRegister::from_code(i); in MultiPushDoubles() local
420 stfd(dreg, MemOperand(location, stack_offset)); in MultiPushDoubles()
446 DoubleRegister dreg = DoubleRegister::from_code(i); in MultiPopDoubles() local
447 lfd(dreg, MemOperand(location, stack_offset)); in MultiPopDoubles()
/third_party/node/deps/v8/src/execution/riscv64/
H A Dsimulator-riscv64.h356 void set_dw_register(int dreg, const int* dbl);
/third_party/mesa3d/src/gallium/drivers/r600/
H A Dr600_shader.c1222 int dreg = d->Semantic.Name == TGSI_SEMANTIC_TESSINNER ? 3 : 2; in tgsi_declaration() local
1236 do_lds_fetch_values(ctx, temp_reg, dreg, 0xf); in tgsi_declaration()
3203 int dreg = ctx->shader->output[output_idx].gpr; in r600_tess_factor_read() local
3220 do_lds_fetch_values(ctx, temp_reg, dreg, ((1u << nc) - 1)); in r600_tess_factor_read()
/third_party/vixl/src/aarch64/
H A Dsimulator-aarch64.h1811 VIXL_DEPRECATED("ReadDRegister", double dreg(unsigned code) const) {

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