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/third_party/node/deps/v8/tools/sanitizers/
H A Dsancov_formatter_test.py129 'src/foo.cc': [[1, 0b1], [11, 0b10], [92, 0b100], [93, 0b0]],
165 'src/foo.cc': [[1, 0b1], [11, 0b10], [92, 0b100], [93, 0b0]],
/third_party/node/deps/v8/src/codegen/riscv64/
H A Dconstants-riscv64.h418 RO_BLT = BRANCH | (0b100 << kFunct3Shift),
425 RO_LBU = LOAD | (0b100 << kFunct3Shift),
433 RO_XORI = OP_IMM | (0b100 << kFunct3Shift),
444 RO_XOR = OP | (0b100 << kFunct3Shift) | (0b0000000 << kFunct7Shift),
483 RO_DIV = OP | (0b100 << kFunct3Shift) | (0b0000001 << kFunct7Shift),
490 RO_DIVW = OP_32 | (0b100 << kFunct3Shift) | (0b0000001 << kFunct7Shift),
615 RO_C_MISC_ALU = C1 | (0b100 << kRvcFunct3Shift),
623 RO_C_JR_MV_ADD = C2 | (0b100 << kRvcFunct3Shift),
639 OP_IVX = OP_V | (0b100 << kFunct3Shift),
660 RO_V_VLSEG5 = LOAD_FP | (0b00 << kRvvMopShift) | (0b100 << kRvvNfShif
[all...]
H A Dassembler-riscv64.cc1544 GenInstrBranchCC_rri(0b100, rs1, rs2, imm13); in blt()
1574 GenInstrLoad_ri(0b100, rd, rs1, imm12); in lbu()
1610 GenInstrALU_ri(0b100, rd, rs1, imm12); in xori()
1656 GenInstrALU_rr(0b0000000, 0b100, rd, rs1, rs2); in xor_()
1800 GenInstrALU_rr(0b0000001, 0b100, rd, rs1, rs2); in div()
1822 GenInstrALUW_rr(0b0000001, 0b100, rd, rs1, rs2); in divw()
2445 GenInstrCBA(0b100, 0b00, C1, rs1, shamt6); in c_srli()
2450 GenInstrCBA(0b100, 0b01, C1, rs1, shamt6); in c_srai()
2455 GenInstrCBA(0b100, 0b10, C1, rs1, imm6); in c_andi()
2973 GenInstrV(LOAD_FP, width, vd, rs1, lumop, mask, 0b00, 0, 0b100); in vlseg5()
[all...]
H A Dassembler-riscv64.h1327 if ((lmul_ & 0b100) != 0) { in vlmax()
/third_party/rust/crates/minimal-lexical/tests/
H A Dmask_tests.rs15 assert_eq!(mask::nth_bit(2), 0b100); in nth_bit_test()
/third_party/skia/third_party/externals/dawn/src/tests/unittests/
H A DMathTests.cpp284 ASSERT_TRUE(IsSubset(0b100, 0b101)); in TEST()
298 ASSERT_FALSE(IsSubset(0b100, 0b000)); in TEST()
/third_party/FreeBSD/sys/dev/usb/net/
H A Dif_axe.c279 int b100 = 0; in axe_setmedium() local
286 b100 = 1; in axe_setmedium()
294 if (b100) in axe_setmedium()
/third_party/skia/src/gpu/geometry/
H A DGrShape.h202 kMakeCanonical_Flag = 0b100,
/third_party/mesa3d/src/compiler/glsl/tests/
H A Darray_refcount_test.cpp685 operand b100 = deref_array( in TEST_F() local
694 b100), in TEST_F()
/third_party/rust/crates/bindgen/bindgen/codegen/
H A Dbitfield_unit_tests.rs124 With [0b11100010], then get(3, 3) is 0b100;
/third_party/mesa3d/src/intel/compiler/
H A Dbrw_reg_type.c233 GFX10_ALIGN1_3SRC_REG_TYPE_UB = 0b100,
H A Dbrw_disasm.c344 [0b100] = "Media Block Read",
355 [0b100] = "RT write",
410 [0b100] = "SIMD8",
/third_party/node/deps/v8/src/base/
H A Dvirtual-address-space.cc35 return 0b100; in PagePermissionsToBitset()
/third_party/node/deps/v8/src/execution/riscv64/
H A Dsimulator-riscv64.h397 if ((rvv_vtype() & 0b100) == 0) { in rvv_vflmul()
437 if ((rvv_vlmul() & 0b100) != 0) { in rvv_vlmax()
/third_party/node/deps/v8/src/wasm/
H A Dwasm-module-builder.cc794 uint8_t expressions_as_elements_mask = 0b100; in WriteTo()
/third_party/node/deps/v8/src/common/
H A Dglobals.h1632 V(RequestTurbofan_Synchronous, 0b100) \
/third_party/skia/src/core/
H A DSkVM.cpp2476 int imm5 = (lane << 3) | 0b100;
2480 int imm5 = (lane << 3) | 0b100;

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