| /third_party/mesa3d/src/intel/vulkan/ |
| H A D | genX_gpu_memcpy.c | 59 anv_batch_emit(batch, GENX(3DSTATE_VF_INSTANCING), vfi) { in emit_common_so_memcpy() function
63 anv_batch_emit(batch, GENX(3DSTATE_VF_SGVS), sgvs); in emit_common_so_memcpy()
67 anv_batch_emit(batch, GENX(3DSTATE_VS), vs); in emit_common_so_memcpy()
68 anv_batch_emit(batch, GENX(3DSTATE_HS), hs); in emit_common_so_memcpy()
69 anv_batch_emit(batch, GENX(3DSTATE_TE), te); in emit_common_so_memcpy()
70 anv_batch_emit(batch, GENX(3DSTATE_DS), DS); in emit_common_so_memcpy()
71 anv_batch_emit(batch, GENX(3DSTATE_GS), gs); in emit_common_so_memcpy()
72 anv_batch_emit(batch, GENX(3DSTATE_PS), gs); in emit_common_so_memcpy()
74 anv_batch_emit(batch, GENX(3DSTATE_SBE), sbe) { in emit_common_so_memcpy() function
100 anv_batch_emit(batc in emit_common_so_memcpy()
104 anv_batch_emit(batch, GENX(3DSTATE_VF_TOPOLOGY), topo) { emit_common_so_memcpy() function
109 anv_batch_emit(batch, GENX(3DSTATE_VF_STATISTICS), vf) { emit_common_so_memcpy() function
165 anv_batch_emit(batch, GENX(3DSTATE_SO_BUFFER), sob) { emit_so_memcpy() function
196 anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_IMM), load) { emit_so_memcpy() function
214 anv_batch_emit(batch, GENX(3DSTATE_STREAMOUT), so) { emit_so_memcpy() function
226 anv_batch_emit(batch, GENX(3DPRIMITIVE), prim) { emit_so_memcpy() function
250 anv_batch_emit(batch, GENX(PIPELINE_SELECT), ps) { emit_so_memcpy_init() function
[all...] |
| H A D | genX_state.c | 66 anv_batch_emit(batch, GENX(3DSTATE_SLICE_TABLE_STATE_POINTERS), ptr) { in emit_slice_hashing_state() function
71 anv_batch_emit(batch, GENX(3DSTATE_3D_MODE), mode) { in emit_slice_hashing_state() function
96 anv_batch_emit(batch, GENX(3DSTATE_SUBSLICE_HASH_TABLE), p) { in emit_slice_hashing_state()
114 anv_batch_emit(batch, GENX(3DSTATE_3D_MODE), p) { in emit_slice_hashing_state()
147 anv_batch_emit(batch, GENX(3DSTATE_SLICE_TABLE_STATE_POINTERS), ptr) { in emit_slice_hashing_state()
152 anv_batch_emit(batch, GENX(3DSTATE_3D_MODE), mode) { in emit_slice_hashing_state()
183 anv_batch_emit(batch, GENX(STATE_BASE_ADDRESS), sba) { in init_common_queue_state() function
242 anv_batch_emit(&batch, GENX(PIPELINE_SELECT), ps) { in init_render_queue_state()
261 anv_batch_emit(&batch, GENX(3DSTATE_AA_LINE_PARAMETERS), aa); in init_render_queue_state()
263 anv_batch_emit( in init_render_queue_state()
724 anv_batch_emit(batch, GENX(3DSTATE_MULTISAMPLE), ms) { emit_multisample() function
767 anv_batch_emit(batch, GENX(3DSTATE_SAMPLE_PATTERN), sp) { emit_sample_pattern() function
842 anv_batch_emit(batch, GENX(3DSTATE_CPS), cps) { emit_shading_rate() function
860 anv_batch_emit(batch, GENX(PIPE_CONTROL), pc) { emit_shading_rate() function
868 anv_batch_emit(batch, GENX(3DSTATE_CPS_POINTERS), cps) { emit_shading_rate() function
[all...] |
| H A D | genX_pipeline.c | 185 anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_VF_INSTANCING), vfi) { in emit_vertex_input()
229 anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_VF_INSTANCING), vfi) { in emit_vertex_input()
236 anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_VF_SGVS), sgvs) { in emit_vertex_input()
262 anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_VF_INSTANCING), vfi) { in emit_vertex_input()
297 anv_batch_emit(batch, GFX7_PIPE_CONTROL, pc) { in emit_urb_setup() function
305 anv_batch_emit(batch, GENX(3DSTATE_URB_VS), urb) { in emit_urb_setup() function
314 anv_batch_emit(batch, GENX(3DSTATE_URB_ALLOC_MESH), zero); in emit_urb_setup()
315 anv_batch_emit(batch, GENX(3DSTATE_URB_ALLOC_TASK), zero); in emit_urb_setup()
339 anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_URB_VS), urb) { in emit_urb_setup_mesh()
344 anv_batch_emit( in emit_urb_setup_mesh()
[all...] |
| H A D | gfx8_cmd_buffer.c | 52 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in cmd_buffer_enable_pma_fix()
72 anv_batch_emit(&cmd_buffer->batch, GENX(MI_LOAD_REGISTER_IMM), lri) { in cmd_buffer_enable_pma_fix()
85 anv_batch_emit(&cmd_buffer->batch, GENX(MI_LOAD_REGISTER_IMM), lri) { in cmd_buffer_enable_pma_fix()
99 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in cmd_buffer_enable_pma_fix()
414 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CC_STATE_POINTERS), ccp) { in cmd_buffer_flush_dynamic_state()
438 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_WM_DEPTH_STENCIL), ds) { in cmd_buffer_flush_dynamic_state()
479 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CC_STATE_POINTERS), ccp) { in cmd_buffer_flush_dynamic_state()
504 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_WM_DEPTH_STENCIL), ds) { in cmd_buffer_flush_dynamic_state()
539 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_DEPTH_BOUNDS), db) { in cmd_buffer_flush_dynamic_state()
548 anv_batch_emit( in cmd_buffer_flush_dynamic_state()
[all...] |
| H A D | genX_query.c | 225 anv_batch_emit(&batch, GENX(MI_BATCH_BUFFER_END), bbe); in CreateQueryPool()
619 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in emit_ps_depth_count()
646 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in emit_query_pc_availability()
880 anv_batch_emit(&cmd_buffer->batch, GENX(MI_REPORT_PERF_COUNT), rpc) { in emit_perf_intel_query()
936 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in CmdBeginQueryIndexedEXT()
946 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in CmdBeginQueryIndexedEXT()
962 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in CmdBeginQueryIndexedEXT()
1020 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in CmdBeginQueryIndexedEXT()
1083 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in CmdBeginQueryIndexedEXT()
1127 anv_batch_emit( in CmdEndQueryIndexedEXT()
[all...] |
| H A D | genX_cmd_buffer.c | 109 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in cmd_buffer_emit_state_base_address()
113 anv_batch_emit( in cmd_buffer_emit_state_base_address()
128 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in cmd_buffer_emit_state_base_address()
149 anv_batch_emit(&cmd_buffer->batch, GENX(STATE_BASE_ADDRESS), sba) { in cmd_buffer_emit_state_base_address()
283 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in cmd_buffer_emit_state_base_address()
811 anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_DATA_IMM), sdi) { in set_image_compressed_bit()
826 anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_DATA_IMM), sdi) { in set_image_fast_clear_state()
917 anv_batch_emit(&cmd_buffer->batch, GENX(MI_PREDICATE), mip) { in anv_cmd_compute_resolve_predicate()
960 anv_batch_emit(&cmd_buffer->batch, GENX(MI_PREDICATE), mip) { in anv_cmd_simple_resolve_predicate()
1074 anv_batch_emit( in init_fast_clear_color()
2096 anv_batch_emit(batch, GENX(PIPE_CONTROL), pipe) { emit_apply_pipe_flushes() function
2241 anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_MEM), lrm) { emit_apply_pipe_flushes() function
2265 anv_batch_emit(batch, GENX(PIPE_CONTROL), pipe) { emit_apply_pipe_flushes() function
2312 anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_IMM), lri) { emit_apply_pipe_flushes() function
5542 anv_batch_emit(batch, GENX(MI_PREDICATE), mip) { CmdDispatchIndirect() function
5550 anv_batch_emit(batch, GENX(MI_PREDICATE), mip) { CmdDispatchIndirect() function
5558 anv_batch_emit(batch, GENX(MI_PREDICATE), mip) { CmdDispatchIndirect() function
5565 anv_batch_emit(batch, GENX(MI_PREDICATE), mip) { CmdDispatchIndirect() function
5576 anv_batch_emit(batch, GENX(MI_PREDICATE), mip) { CmdDispatchIndirect() function
7504 anv_batch_emit(batch, GENX(PIPE_CONTROL), pc) { cmd_emit_timestamp() function
[all...] |
| H A D | gfx7_cmd_buffer.c | 123 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CC_STATE_POINTERS), ccp) { in cmd_buffer_flush_dynamic_state()
129 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_LINE_STIPPLE), ls) { in cmd_buffer_flush_dynamic_state()
186 anv_batch_emit(&cmd_buffer->batch, in cmd_buffer_flush_dynamic_state()
200 anv_batch_emit(&cmd_buffer->batch, GFX75_3DSTATE_VF, vf) { in cmd_buffer_flush_dynamic_state()
206 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_INDEX_BUFFER), ib) { in cmd_buffer_flush_dynamic_state()
299 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_BLEND_STATE_POINTERS), bsp) { in cmd_buffer_flush_dynamic_state()
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| H A D | anv_batch_chain.c | 590 anv_batch_emit(&cmd_buffer->batch, GFX8_MI_BATCH_BUFFER_START, bbs) { in emit_batch_buffer_start()
996 anv_batch_emit(&cmd_buffer->batch, GFX8_MI_BATCH_BUFFER_END, bbe); in anv_cmd_buffer_end_batch_buffer()
1000 anv_batch_emit(&cmd_buffer->batch, GFX8_MI_NOOP, noop); in anv_cmd_buffer_end_batch_buffer()
1028 anv_batch_emit(&cmd_buffer->batch, GFX8_MI_NOOP, noop); in anv_cmd_buffer_end_batch_buffer()
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| H A D | anv_private.h | 1686 #define anv_batch_emit(batch, cmd, name) \ macro
1701 anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_IMM), lri) { \
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| H A D | anv_device.c | 2962 anv_batch_emit(&batch, GFX7_MI_BATCH_BUFFER_END, bbe); in anv_device_init_trivial_batch()
2963 anv_batch_emit(&batch, GFX7_MI_NOOP, noop); in anv_device_init_trivial_batch()
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