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Searched refs:addr0 (Results 1 - 13 of 13) sorted by relevance

/third_party/ffmpeg/libavcodec/mips/
H A Dmpegvideo_mmi.c67 PTR_ADDU "%[addr0], %[block], %[nCoeffs] \n\t" in ff_dct_unquantize_h263_intra_mmi()
68 MMI_LDC1(%[ftmp1], %[addr0], 0x00) in ff_dct_unquantize_h263_intra_mmi()
69 MMI_LDC1(%[ftmp2], %[addr0], 0x08) in ff_dct_unquantize_h263_intra_mmi()
87 MMI_SDC1(%[ftmp1], %[addr0], 0x00) in ff_dct_unquantize_h263_intra_mmi()
88 MMI_SDC1(%[ftmp2], %[addr0], 0x08) in ff_dct_unquantize_h263_intra_mmi()
94 [addr0]"=&r"(addr[0]) in ff_dct_unquantize_h263_intra_mmi()
128 PTR_ADDU "%[addr0], %[block], %[nCoeffs] \n\t" in ff_dct_unquantize_h263_inter_mmi()
129 MMI_LDC1(%[ftmp1], %[addr0], 0x00) in ff_dct_unquantize_h263_inter_mmi()
130 MMI_LDC1(%[ftmp2], %[addr0], 0x08) in ff_dct_unquantize_h263_inter_mmi()
148 MMI_SDC1(%[ftmp1], %[addr0], in ff_dct_unquantize_h263_inter_mmi()
[all...]
H A Dh264pred_mmi.c66 PTR_ADDI "%[addr0], %[src], -0x01 \n\t" in ff_pred16x16_horizontal_8_mmi()
70 "lbu %[tmp0], 0x00(%[addr0]) \n\t" in ff_pred16x16_horizontal_8_mmi()
76 PTR_ADDU "%[addr0], %[addr0], %[stride] \n\t" in ff_pred16x16_horizontal_8_mmi()
78 "lbu %[tmp0], 0x00(%[addr0]) \n\t" in ff_pred16x16_horizontal_8_mmi()
85 PTR_ADDU "%[addr0], %[addr0], %[stride] \n\t" in ff_pred16x16_horizontal_8_mmi()
90 [addr0]"=&r"(addr[0]), [addr1]"=&r"(addr[1]) in ff_pred16x16_horizontal_8_mmi()
103 PTR_ADDI "%[addr0], %[src], -0x01 \n\t" in ff_pred16x16_dc_8_mmi()
107 "lbu %[tmp1], 0x00(%[addr0]) \ in ff_pred16x16_dc_8_mmi()
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H A Dhpeldsp_mmi.c157 PTR_ADDU "%[addr0], %[pixels], %[line_size] \n\t" in ff_avg_pixels4_8_mmi()
159 MMI_ULWC1(%[ftmp1], %[addr0], 0x00) in ff_avg_pixels4_8_mmi()
170 PTR_ADDU "%[pixels], %[addr0], %[line_size] \n\t" in ff_avg_pixels4_8_mmi()
177 [addr0]"=&r"(addr[0]), [addr1]"=&r"(addr[1]), in ff_avg_pixels4_8_mmi()
197 PTR_ADDU "%[addr0], %[pixels], %[line_size] \n\t" in ff_avg_pixels8_8_mmi()
198 MMI_ULDC1(%[ftmp1], %[addr0], 0x00) in ff_avg_pixels8_8_mmi()
210 PTR_ADDU "%[addr0], %[pixels], %[line_size] \n\t" in ff_avg_pixels8_8_mmi()
211 MMI_ULDC1(%[ftmp1], %[addr0], 0x00) in ff_avg_pixels8_8_mmi()
228 [addr0]"=&r"(addr[0]), [addr1]"=&r"(addr[1]), in ff_avg_pixels8_8_mmi()
255 PTR_ADDU "%[addr0], in ff_avg_pixels16_8_mmi()
[all...]
H A Dh264dsp_mmi.c360 PTR_ADDIU "%[addr0], %[dst], 0x04 \n\t" in ff_h264_idct8_add_8_mmi()
559 MMI_ULWC1(%[ftmp6], %[addr0], 0x00) in ff_h264_idct8_add_8_mmi()
560 MMI_LWXC1(%[ftmp7], %[addr0], %[stride], 0x00) in ff_h264_idct8_add_8_mmi()
569 MMI_SWC1(%[ftmp6], %[addr0], 0x00) in ff_h264_idct8_add_8_mmi()
570 MMI_SWXC1(%[ftmp7], %[addr0], %[stride], 0x00) in ff_h264_idct8_add_8_mmi()
571 PTR_ADDU "%[addr0], %[addr0], %[stride] \n\t" in ff_h264_idct8_add_8_mmi()
572 PTR_ADDU "%[addr0], %[addr0], %[stride] \n\t" in ff_h264_idct8_add_8_mmi()
573 MMI_ULWC1(%[ftmp6], %[addr0], in ff_h264_idct8_add_8_mmi()
[all...]
H A Dh264chroma_mmi.c571 PTR_ADDU "%[addr0], %[src], %[step] \n\t" in ff_put_h264_chroma_mc4_mmi()
572 MMI_ULWC1(%[ftmp2], %[addr0], 0x00) in ff_put_h264_chroma_mc4_mmi()
590 [addr0]"=&r"(addr[0]), in ff_put_h264_chroma_mc4_mmi()
694 PTR_ADDU "%[addr0], %[src], %[step] \n\t" in ff_avg_h264_chroma_mc4_mmi()
695 MMI_ULWC1(%[ftmp2], %[addr0], 0x00) in ff_avg_h264_chroma_mc4_mmi()
715 [addr0]"=&r"(addr[0]), in ff_avg_h264_chroma_mc4_mmi()
H A Dvc1dsp_mmi.c145 PTR_ADDU "%[addr0], %[dest], %[linesize] \n\t" in ff_vc1_inv_trans_8x8_dc_mmi()
146 MMI_LDC1(%[ftmp2], %[addr0], 0x00) in ff_vc1_inv_trans_8x8_dc_mmi()
147 PTR_ADDU "%[addr0], %[addr0], %[linesize] \n\t" in ff_vc1_inv_trans_8x8_dc_mmi()
148 MMI_LDC1(%[ftmp3], %[addr0], 0x00) in ff_vc1_inv_trans_8x8_dc_mmi()
149 PTR_ADDU "%[addr0], %[addr0], %[linesize] \n\t" in ff_vc1_inv_trans_8x8_dc_mmi()
150 MMI_LDC1(%[ftmp4], %[addr0], 0x00) in ff_vc1_inv_trans_8x8_dc_mmi()
176 PTR_ADDU "%[addr0], %[dest], %[linesize] \n\t" in ff_vc1_inv_trans_8x8_dc_mmi()
177 MMI_SDC1(%[ftmp2], %[addr0], in ff_vc1_inv_trans_8x8_dc_mmi()
[all...]
H A Dvp8dsp_mmi.c1453 PTR_ADDU "%[addr0], %[src], %[srcstride] \n\t" in ff_put_vp8_pixels16_mmi()
1457 MMI_ULDC1(%[ftmp1], %[addr0], 0x00) in ff_put_vp8_pixels16_mmi()
1458 "ldl %[tmp1], 0x0f(%[addr0]) \n\t" in ff_put_vp8_pixels16_mmi()
1459 "ldr %[tmp1], 0x08(%[addr0]) \n\t" in ff_put_vp8_pixels16_mmi()
1466 PTR_ADDU "%[src], %[addr0], %[srcstride] \n\t" in ff_put_vp8_pixels16_mmi()
1474 [addr0]"=&r"(addr[0]), [addr1]"=&r"(addr[1]), in ff_put_vp8_pixels16_mmi()
1500 PTR_ADDU "%[addr0], %[src], %[srcstride] \n\t" in ff_put_vp8_pixels8_mmi()
1502 "ldl %[tmp0], 0x07(%[addr0]) \n\t" in ff_put_vp8_pixels8_mmi()
1503 "ldr %[tmp0], 0x00(%[addr0]) \n\t" in ff_put_vp8_pixels8_mmi()
1509 PTR_ADDU "%[src], %[addr0], in ff_put_vp8_pixels8_mmi()
[all...]
/third_party/mesa3d/src/freedreno/ir3/
H A Dir3_sched.c98 struct ir3_instruction *addr0; /* current a0.x user, if any */ member
271 assert(ctx->addr0 == NULL); in schedule()
272 ctx->addr0 = instr; in schedule()
476 if (writes_addr0(instr) && ctx->addr0) { in check_instr()
477 assert(ctx->addr0 != instr); in check_instr()
1183 ctx->addr0 = NULL; in sched_block()
1256 split_addr(ctx, &ctx->addr0, ir->a0_users, ir->a0_users_count); in sched_block()
/third_party/mesa3d/src/gallium/drivers/r600/sfn/
H A Dsfn_nir_lower_tess_io.cpp416 nir_ssa_def *addr0 = r600_tcs_base_address(b, base, rel_patch_id); in r600_lower_tess_io_impl() local
417 nir_ssa_def *addr_outer = nir_iadd(b, addr0, load_offset_group(b, tf_inner_address_offset + ncomps)); in r600_lower_tess_io_impl()
509 nir_ssa_def *addr0 = r600_tcs_base_address(b, base, rel_patch_id); in r600_append_tcs_TF_emission() local
511 nir_ssa_def *addr_outer = nir_iadd(b, addr0, load_offset_group(b, outer_comps)); in r600_append_tcs_TF_emission()
555 nir_ssa_def *addr1 = nir_iadd(b, addr0, load_offset_group(b, 4 + inner_comps)); in r600_append_tcs_TF_emission()
/third_party/mesa3d/src/compiler/nir/
H A Dnir_lower_io.c2754 nir_build_addr_ieq(nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1, in nir_build_addr_ieq() argument
2766 return nir_ball_iequal(b, addr0, addr1); in nir_build_addr_ieq()
2769 return nir_ball_iequal(b, nir_channels(b, addr0, 0xb), in nir_build_addr_ieq()
2773 assert(addr0->num_components == 1 && addr1->num_components == 1); in nir_build_addr_ieq()
2774 return nir_ieq(b, nir_u2u32(b, addr0), nir_u2u32(b, addr1)); in nir_build_addr_ieq()
2777 assert(addr0->num_components == 1 && addr1->num_components == 1); in nir_build_addr_ieq()
2778 return nir_ball_iequal(b, nir_unpack_64_2x32(b, addr0), nir_unpack_64_2x32(b, addr1)); in nir_build_addr_ieq()
2788 nir_build_addr_isub(nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1, in nir_build_addr_isub() argument
2797 assert(addr0->num_components == 1); in nir_build_addr_isub()
2799 return nir_isub(b, addr0, addr in nir_build_addr_isub()
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H A Dnir.h4775 nir_ssa_def *nir_build_addr_ieq(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
4778 nir_ssa_def *nir_build_addr_isub(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
/third_party/curl/lib/
H A Dconnect.c752 const struct Curl_addrinfo *addr0, *addr1; in start_connect() local
796 addr0 = addr_first_match(remotehost->addr, ai_family0); in start_connect()
798 if(!addr0 && addr1) { in start_connect()
799 /* switch around, so a single baller always uses addr0 */ in start_connect()
800 addr0 = addr1; in start_connect()
806 if(!addr0) { in start_connect()
811 result = eyeballer_new(&ctx->baller[0], ctx->cf_create, addr0, ai_family0, in start_connect()
/third_party/node/src/
H A Dcares_wrap.cc1779 unsigned char addr0[sizeof(struct in6_addr)]; in SetLocalAddress() local
1788 if (uv_inet_pton(AF_INET, *ip0, &addr0) == 0) { in SetLocalAddress()
1789 ares_set_local_ip4(channel->cares_channel(), ReadUint32BE(addr0)); in SetLocalAddress()
1791 } else if (uv_inet_pton(AF_INET6, *ip0, &addr0) == 0) { in SetLocalAddress()
1792 ares_set_local_ip6(channel->cares_channel(), addr0); in SetLocalAddress()

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