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Searched refs:Sd (Results 1 - 23 of 23) sorted by relevance

/third_party/node/deps/v8/src/diagnostics/arm/
H A Ddisasm-arm.cc1408 // vcvt: Sd = Dm
1411 // Sd = vabs(Sm)
1413 // Sd = vneg(Sm)
1415 // Sd = vadd(Sn, Sm)
1417 // Sd = vsub(Sn, Sm)
1419 // Sd = vmul(Sn, Sm)
1421 // Sd = vmla(Sn, Sm)
1423 // Sd = vmls(Sn, Sm)
1425 // Sd = vdiv(Sn, Sm)
1427 // vcmp(Sd, S
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/third_party/node/deps/v8/src/baseline/riscv64/
H A Dbaseline-compiler-riscv64-inl.h44 __ masm()->Sd(kInterpreterAccumulatorRegister, MemOperand(sp, i * 8)); in PrologueFillFrame()
54 __ masm()->Sd(kInterpreterAccumulatorRegister, MemOperand(sp, i * 8)); in PrologueFillFrame()
59 __ masm()->Sd(kInterpreterAccumulatorRegister, MemOperand(sp, i * 8)); in PrologueFillFrame()
H A Dbaseline-assembler-riscv64-inl.h223 __ Sd(source, output); in Move()
/third_party/node/deps/v8/src/baseline/mips64/
H A Dbaseline-compiler-mips64-inl.h45 __ masm()->Sd(kInterpreterAccumulatorRegister, MemOperand(sp, i * 8)); in PrologueFillFrame()
55 __ masm()->Sd(kInterpreterAccumulatorRegister, MemOperand(sp, i * 8)); in PrologueFillFrame()
60 __ masm()->Sd(kInterpreterAccumulatorRegister, MemOperand(sp, i * 8)); in PrologueFillFrame()
H A Dbaseline-assembler-mips64-inl.h222 __ Sd(source, output); in Move()
376 __ Sd(scratch, FieldMemOperand(target, offset)); in StoreTaggedSignedField()
382 __ Sd(value, FieldMemOperand(target, offset)); in StoreTaggedFieldWithWriteBarrier()
391 __ Sd(value, FieldMemOperand(target, offset)); in StoreTaggedFieldNoWriteBarrier()
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
H A DIceAssemblerARM32.cpp1118 void AssemblerARM32::emitMoveSS(CondARM32::Cond Cond, IValueT Sd, IValueT Sm) {
1120 // vmov<c>.f32 <Sd>, <Sm>
1122 // cccc11101D110000dddd101001M0mmmm where cccc=Cond, ddddD=Sd, and mmmmM=Sm.
1125 emitVFPsss(Cond, VmovssOpcode, Sd, S0, Sm);
1294 IValueT Sd, IValueT Sn, IValueT Sm) {
1295 assert(Sd < RegARM32::getNumSRegs());
1302 (getYInRegXXXXY(Sd) << 22) | (getXXXXInRegXXXXY(Sn) << 16) |
1303 (getXXXXInRegXXXXY(Sd) << 12) | (getYInRegXXXXY(Sn) << 7) |
1311 const IValueT Sd = encodeSRegister(OpSd, "Sd", InstNam
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H A DIceAssemblerARM32.h505 // Sd = Sm
508 // Sd = Qm[Index]
774 // Pattern cccc111xxDxxxxxxdddd101xxxMxmmmm where cccc=Cond, ddddD=Sd,
776 void emitVFPsd(CondARM32::Cond Cond, IValueT Opcode, IValueT Sd, IValueT Dm);
806 // cccc11101D110000dddd101001M0mmmm where cccc=Cond, ddddD=Sd, and mmmmM=Sm.
807 // Assigns Sd the value of Sm.
808 void emitMoveSS(CondARM32::Cond Cond, IValueT Sd, IValueT Sm);
894 void emitVFPsss(CondARM32::Cond Cond, IValueT Opcode, IValueT Sd, IValueT Sn,
/third_party/node/deps/v8/src/builtins/mips64/
H A Dbuiltins-mips64.cc373 __ Sd(v0, FieldMemOperand(a1, JSGeneratorObject::kInputOrDebugPosOffset)); in Generate_ResumeGeneratorTrampoline()
591 __ Sd(zero_reg, MemOperand(s5)); in Generate_JSEntryVariant()
622 __ Sd(fp, MemOperand(s1)); in Generate_JSEntryVariant()
647 __ Sd(v0, MemOperand(s1)); // We come back from 'invoke'. result is in v0. in Generate_JSEntryVariant()
696 __ Sd(zero_reg, MemOperand(a5)); in Generate_JSEntryVariant()
703 __ Sd(a5, MemOperand(a4)); in Generate_JSEntryVariant()
819 __ Sd(optimized_code, FieldMemOperand(closure, JSFunction::kCodeOffset)); in ReplaceClosureCodeWithOptimizedCode()
1327 __ Sd(a3, MemOperand(a5)); in Generate_InterpreterEntryTrampoline()
1384 __ Sd(kInterpreterBytecodeOffsetRegister, in Generate_InterpreterEntryTrampoline()
1398 __ Sd(a in Generate_InterpreterEntryTrampoline()
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/third_party/node/deps/v8/src/codegen/mips64/
H A Dmacro-assembler-mips64.h298 void Sd(Register rd, const MemOperand& rs);
302 Sd(src, MemOperand(sp, 0)); in push()
311 Sd(src1, MemOperand(sp, 1 * kPointerSize)); in Push()
312 Sd(src2, MemOperand(sp, 0 * kPointerSize)); in Push()
318 Sd(src1, MemOperand(sp, 2 * kPointerSize)); in Push()
319 Sd(src2, MemOperand(sp, 1 * kPointerSize)); in Push()
320 Sd(src3, MemOperand(sp, 0 * kPointerSize)); in Push()
326 Sd(src1, MemOperand(sp, 3 * kPointerSize)); in Push()
327 Sd(src2, MemOperand(sp, 2 * kPointerSize)); in Push()
328 Sd(src in Push()
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H A Dmacro-assembler-mips64.cc1312 Sd(rd, rs); in CallRecordWriteStub()
1438 void TurboAssembler::Sd(Register rd, const MemOperand& rs) { in CallRecordWriteStub() function in v8::internal::TurboAssembler
1927 Sd(ToRegister(i), MemOperand(sp, stack_offset)); in CallRecordWriteStub()
2668 Sd(scratch, dst); in CallRecordWriteStub()
4485 Sd(ra, MemOperand(sp)); in CallRecordWriteStub()
4599 Sd(receiver, MemOperand(sp)); in CallRecordWriteStub()
4734 Sd(sp, MemOperand(t2)); in CallRecordWriteStub()
4747 Sd(a1, MemOperand(scratch)); in CallRecordWriteStub()
4904 Sd(t1, MemOperand(dest, 0)); in CallRecordWriteStub()
4916 Sd(t in CallRecordWriteStub()
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/third_party/node/deps/v8/src/codegen/riscv64/
H A Dmacro-assembler-riscv64.h287 void Sd(Register rd, const MemOperand& rs);
291 Sd(src, MemOperand(sp, 0)); in push()
300 Sd(src1, MemOperand(sp, 1 * kSystemPointerSize)); in Push()
301 Sd(src2, MemOperand(sp, 0 * kSystemPointerSize)); in Push()
307 Sd(src1, MemOperand(sp, 2 * kSystemPointerSize)); in Push()
308 Sd(src2, MemOperand(sp, 1 * kSystemPointerSize)); in Push()
309 Sd(src3, MemOperand(sp, 0 * kSystemPointerSize)); in Push()
315 Sd(src1, MemOperand(sp, 3 * kSystemPointerSize)); in Push()
316 Sd(src2, MemOperand(sp, 2 * kSystemPointerSize)); in Push()
317 Sd(src in Push()
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H A Dmacro-assembler-riscv64.cc1443 void TurboAssembler::Sd(Register rd, const MemOperand& rs) { in Sd() function in v8::internal::TurboAssembler
1667 Sd(reg, MemOperand(sp, stack_offset)); \ in MultiPush()
3444 Sd(ra, MemOperand(sp)); in StoreReturnAddressAndCall()
3614 Sd(sp, MemOperand(handler_address)); in PushStackHandler()
3627 Sd(a1, MemOperand(scratch)); in PopStackHandler()
3747 Sd(t1, MemOperand(dest, 0)); in InvokePrologue()
3759 Sd(t0, MemOperand(a7, 0)); in InvokePrologue()
4044 Sd(kScratchReg, dst); in StoreLane()
4375 Sd(ra, MemOperand(sp, 3 * kSystemPointerSize)); in EnterExitFrame()
4376 Sd(f in EnterExitFrame()
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/third_party/node/deps/v8/src/builtins/riscv64/
H A Dbuiltins-riscv64.cc627 __ Sd(zero_reg, MemOperand(s5)); in Generate_JSEntryVariant()
657 __ Sd(fp, MemOperand(s1)); in Generate_JSEntryVariant()
681 __ Sd(a0, MemOperand(s1)); // We come back from 'invoke'. result is in a0. in Generate_JSEntryVariant()
730 __ Sd(zero_reg, MemOperand(a5)); in Generate_JSEntryVariant()
737 __ Sd(a5, MemOperand(a4)); in Generate_JSEntryVariant()
1391 __ Sd(a3, MemOperand(a5)); in Generate_InterpreterEntryTrampoline()
1451 __ Sd(kInterpreterBytecodeOffsetRegister, in Generate_InterpreterEntryTrampoline()
1465 __ Sd(a5, MemOperand(fp, InterpreterFrameConstants::kBytecodeOffsetFromFp)); in Generate_InterpreterEntryTrampoline()
1753 __ Sd(a2, MemOperand(fp, InterpreterFrameConstants::kBytecodeOffsetFromFp)); in Generate_InterpreterEnterAtNextBytecode()
1789 __ Sd(a in Generate_ContinueToBuiltinHelper()
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/third_party/node/deps/v8/src/regexp/mips64/
H A Dregexp-macro-assembler-mips64.cc185 __ Sd(a0, register_location(reg)); in AdvanceRegister()
196 __ Sd(a0, MemOperand(frame_pointer(), kBacktrackCount)); in Backtrack()
667 __ Sd(src, MemOperand(scratch)); in StoreRegExpStackPointerToMemory()
677 __ Sd(scratch, MemOperand(frame_pointer(), kRegExpStackBasePointer)); in PushRegExpBasePointer()
793 __ Sd(a0, MemOperand(frame_pointer(), kStringStartMinusOne)); in GetCode()
822 __ Sd(a0, MemOperand(a1)); in GetCode()
828 __ Sd(a0, register_location(i)); in GetCode()
888 __ Sd(a0, MemOperand(frame_pointer(), kSuccessfulCaptures)); in GetCode()
896 __ Sd(a1, MemOperand(frame_pointer(), kNumOutputRegisters)); in GetCode()
899 __ Sd(a in GetCode()
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/third_party/node/deps/v8/src/regexp/riscv64/
H A Dregexp-macro-assembler-riscv64.cc151 __ Sd(a0, register_location(reg)); in AdvanceRegister()
161 __ Sd(a0, MemOperand(frame_pointer(), kBacktrackCount)); in Backtrack()
648 __ Sd(src, MemOperand(scratch)); in StoreRegExpStackPointerToMemory()
659 __ Sd(scratch2, MemOperand(frame_pointer(), kRegExpStackBasePointer)); in PushRegExpBasePointer()
783 __ Sd(a0, MemOperand(frame_pointer(), kStringStartMinusOne)); in GetCode()
809 __ Sd(a0, MemOperand(a1)); in GetCode()
815 __ Sd(a0, register_location(i)); in GetCode()
878 __ Sd(a0, MemOperand(frame_pointer(), kSuccessfulCaptures)); in GetCode()
885 __ Sd(a1, MemOperand(frame_pointer(), kNumOutputRegisters)); in GetCode()
888 __ Sd(a in GetCode()
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/third_party/skia/src/core/
H A DSkMatrix.cpp1733 double Sa, Sb, Sd; in SkDecomposeUpper2x2() local
1741 Sd = D; in SkDecomposeUpper2x2()
1753 Sd = -B*sinQ + D*cosQ; in SkDecomposeUpper2x2()
1764 w2 = Sd; in SkDecomposeUpper2x2()
1768 double diff = Sa - Sd; in SkDecomposeUpper2x2()
1770 double trace = Sa + Sd; in SkDecomposeUpper2x2()
/third_party/node/deps/v8/src/wasm/baseline/mips64/
H A Dliftoff-assembler-mips64.h323 Sd(scratch, MemOperand(fp, (i - stack_param_delta) * 8)); in PrepareTailCall()
478 Sd(instance, liftoff::GetInstanceOperand()); in SpillInstance()
507 Sd(src.gp(), dst_op); in StoreTaggedPointer()
699 Sd(src.gp(), dst_op); in AtomicStore()
985 Sd(reg.gp(), dst); in Spill()
1016 Sd(tmp.gp(), dst); in Spill()
1064 Sd(zero_reg, liftoff::GetStackSlot(start + remainder)); in FillStackSlotsWithZero()
1079 Sd(zero_reg, MemOperand(a0)); in FillStackSlotsWithZero()
1107 Sd(scratch, MemOperand(dst.gp(), offset)); in IncrementSmi()
/third_party/node/deps/v8/src/compiler/backend/mips64/
H A Dcode-generator-mips64.cc846 __ Sd(value, MemOperand(kScratchReg)); in AssembleArchInstruction()
850 __ Sd(value, MemOperand(kScratchReg)); in AssembleArchInstruction()
1660 __ Sd(i.InputOrZeroRegister(2), i.MemoryOperand()); in AssembleArchInstruction()
1765 __ Sd(i.InputRegister(0), MemOperand(sp, i.InputInt32(1))); in AssembleArchInstruction()
1905 ASSEMBLE_ATOMIC_STORE_INTEGER(Sd); in AssembleArchInstruction()
4376 __ Sd(src, g.ToMemOperand(destination)); in AssembleConstructFrame()
4386 __ Sd(temp, g.ToMemOperand(destination)); in AssembleConstructFrame()
4432 if (destination->IsStackSlot()) __ Sd(dst, g.ToMemOperand(destination)); in AssembleConstructFrame()
4437 __ Sd(zero_reg, dst); in AssembleConstructFrame()
4440 __ Sd(kScratchRe in AssembleConstructFrame()
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/third_party/skia/third_party/externals/angle2/src/libANGLE/renderer/vulkan/
H A DUtilsVk.h360 uint32_t Sd = 0; member
H A DUtilsVk.cpp1784 shaderParams.Sd = shaderParams.Nd * shaderParams.Bd; in convertVertexBuffer()
3010 // Nd = 4, Sd = dst.pixelBytes, use srcEmulatedAlpha in copyImageBits()
3013 // Nd = 4, Sd = dst.pixelBytes, use srcEmulatedAlpha in copyImageBits()
3016 // Nd = 3, Sd = dst.pixelBytes in copyImageBits()
3028 shaderParams.Sd = shaderParams.Nd * shaderParams.Bd; in copyImageBits()
/third_party/node/deps/v8/src/wasm/baseline/riscv64/
H A Dliftoff-assembler-riscv64.h132 assm->Sd(src.gp(), dst); in Store()
308 Sd(scratch, MemOperand(fp, (i - stack_param_delta) * 8)); in PrepareTailCall()
471 Sd(instance, liftoff::GetInstanceOperand()); in SpillInstance()
616 TurboAssembler::Sd(src.gp(), dst_op); in Store()
999 Sd(reg.gp(), dst); in Spill()
1036 Sd(tmp.gp(), dst); in Spill()
1090 Sd(zero_reg, liftoff::GetStackSlot(start + remainder)); in FillStackSlotsWithZero()
1105 Sd(zero_reg, MemOperand(a0)); in FillStackSlotsWithZero()
1725 Sd(scratch, MemOperand(dst.gp(), offset)); in IncrementSmi()
1872 Sd(kScratchRe in StoreLane()
[all...]
/third_party/node/deps/v8/src/compiler/backend/riscv64/
H A Dcode-generator-riscv64.cc770 __ Sd(kScratchReg, in AssembleArchInstruction()
1629 __ Sd(i.InputOrZeroRegister(2), i.MemoryOperand()); in AssembleArchInstruction()
1738 __ Sd(i.InputOrZeroRegister(0), MemOperand(sp, i.InputInt32(1))); in AssembleArchInstruction()
1780 ASSEMBLE_ATOMIC_STORE_INTEGER(Sd); in AssembleArchInstruction()
4095 __ Sd(src, g.ToMemOperand(destination)); in AssembleMove()
4105 __ Sd(temp, g.ToMemOperand(destination)); in AssembleMove()
4166 if (destination->IsStackSlot()) __ Sd(dst, g.ToMemOperand(destination)); in AssembleMove()
4315 __ Sd(temp, dst); in AssembleSwap()
4372 __ Sd(temp_0, dst); in AssembleSwap()
4373 __ Sd(temp_ in AssembleSwap()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Instrumentation/
H A DMemorySanitizer.cpp3561 Value *Sd = getShadow(D);
3564 Value *Sa0 = IRB.CreateSelect(B, Sc, Sd);
3569 // Sa = select Sb, poisoned, (select b, Sc, Sd)
3572 // Sa = select Sb, [ (c^d) | Sc | Sd ], [ b ? Sc : Sd ]
3575 // If !Sb (condition is unpoisoned), simply pick one of Sc and Sd.
3582 Sa1 = IRB.CreateOr({IRB.CreateXor(C, D), Sc, Sd});

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