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Searched refs:PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE (Results 1 - 12 of 12) sorted by relevance

/third_party/mesa3d/src/gallium/drivers/crocus/
H A Dcrocus_pipe_control.c221 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | in crocus_emit_mi_flush()
290 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | in crocus_flush_all_caches()
317 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE); in crocus_texture_barrier()
327 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE); in crocus_texture_barrier()
347 bits |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | in crocus_memory_barrier()
352 bits |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | in crocus_memory_barrier()
H A Dcrocus_context.h249 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE = (1 << 15), enumerator
271 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | \
H A Dcrocus_monitor.c128 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
H A Dcrocus_blit.c341 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE); in tex_cache_flush_hack()
H A Dcrocus_resource.c1836 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE; in crocus_flush_bits_for_history()
1840 flush |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE; in crocus_flush_bits_for_history()
H A Dcrocus_resolve.c427 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | in crocus_flush_depth_and_render_caches()
H A Dcrocus_state.c484 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | in flush_after_state_base_change()
1101 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | in setup_l3_config()
1260 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | in emit_pipeline_select()
8844 (flags & PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE) ? "TC " : "",
8899 flags & PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE;
8902 flags & PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE;
/third_party/mesa3d/src/gallium/drivers/iris/
H A Diris_pipe_control.c214 [IRIS_DOMAIN_SAMPLER_READ] = PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE, in iris_emit_buffer_barrier_for()
217 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE : in iris_emit_buffer_barrier_for()
347 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | in iris_flush_all_caches()
368 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE); in iris_texture_barrier()
378 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE); in iris_texture_barrier()
395 bits |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | in iris_memory_barrier()
400 bits |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | in iris_memory_barrier()
H A Diris_utrace.c150 { .iris = PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE, .ds = INTEL_DS_TEXTURE_CACHE_INVALIDATE_BIT, }, in iris_utrace_pipe_flush_bit_to_ds_stall_flag()
H A Diris_context.h347 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE = (1 << 15), enumerator
374 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | \
H A Diris_blit.c320 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE); in tex_cache_flush_hack()
H A Diris_state.c465 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | in flush_after_state_base_change()
661 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | in emit_pipeline_select()
7673 if ((flags & PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE)) in batch_mark_sync_for_pipe_control()
8016 if (GFX_VER >= 9 && (flags & PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE)) { in iris_emit_raw_pipe_control()
8120 (flags & PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE) ? "TC " : "", in iris_emit_raw_pipe_control()
8191 flags & PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE; in iris_emit_raw_pipe_control()

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