| /third_party/vixl/src/aarch64/ |
| H A D | operands-aarch64.cc | 141 reg_(NoReg), in Operand()
148 reg_(NoReg), in Operand()
179 bool Operand::IsImmediate() const { return reg_.Is(NoReg); } in IsImmediate()
227 : base_(NoReg), in MemOperand()
228 regoffset_(NoReg), in MemOperand()
238 regoffset_(NoReg), in MemOperand()
287 regoffset_(NoReg), in MemOperand()
334 if (regoffset_.Is(NoReg)) { in IsEquivalentToPlainRegister()
347 return (addrmode_ == Offset) && regoffset_.Is(NoReg); in IsImmediateOffset()
352 return (addrmode_ == Offset) && !regoffset_.Is(NoReg); in IsRegisterOffset()
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| H A D | registers-aarch64.h | 282 // Note that NoReg aliases itself, so that 'Is' implies 'Aliases'.
839 const Register NoReg;
971 // set to NoReg are ignored. The system stack pointer may be specified.
975 const CPURegister& reg3 = NoReg,
976 const CPURegister& reg4 = NoReg,
977 const CPURegister& reg5 = NoReg,
978 const CPURegister& reg6 = NoReg,
979 const CPURegister& reg7 = NoReg,
980 const CPURegister& reg8 = NoReg) {
1026 // specified. Arguments set to NoReg ar
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| H A D | operands-aarch64.h | 410 // pre- and post-index modes.) Otherwise, return NoReg.
488 regoffset_(NoReg), in SVEMemOperand()
507 regoffset_(NoReg), in SVEMemOperand()
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| H A D | macro-assembler-aarch64.cc | 584 VIXL_ASSERT((reg.Is(NoReg) || (type >= kBranchTypeFirstUsingReg)) && in Emit()
2309 PushHelper(2, size, src, src, NoReg, NoReg); in Emit()
2313 PushHelper(1, size, src, NoReg, NoReg, NoReg); in Emit()
3078 // Release(NoReg) has no effect. in Emit()
3140 // Include(NoReg) has no effect. in Emit()
3200 // Exclude(NoReg) has no effect. in Emit()
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| H A D | macro-assembler-aarch64.h | 937 // If an argument register is 'NoReg', all further arguments are also assumed
938 // to be 'NoReg', and are thus not pushed or popped.
961 const CPURegister& src1 = NoReg,
962 const CPURegister& src2 = NoReg,
963 const CPURegister& src3 = NoReg);
965 const CPURegister& dst1 = NoReg,
966 const CPURegister& dst2 = NoReg,
967 const CPURegister& dst3 = NoReg);
1171 void B(Label* label, BranchType type, Register reg = NoReg, int bit = -1);
8760 const Register& reg2 = NoReg,
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| H A D | assembler-aarch64.cc | 2563 VIXL_ASSERT(!addr.GetRegisterOffset().Is(NoReg) || in LoadStoreStructVerify()
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| /third_party/vixl/src/aarch32/ |
| H A D | operands-aarch32.h | 57 : imm_(immediate), rm_(NoReg), shift_(LSL), amount_(0), rs_(NoReg) {} in Operand()
59 : imm_(immediate), rm_(NoReg), shift_(LSL), amount_(0), rs_(NoReg) {} in Operand()
66 : imm_(0), rm_(rm), shift_(LSL), amount_(0), rs_(NoReg) { in Operand()
74 : imm_(0), rm_(rm), shift_(shift), amount_(0), rs_(NoReg) { in Operand()
84 : imm_(0), rm_(rm), shift_(shift), amount_(amount), rs_(NoReg) { in Operand()
641 rm_(NoReg), in MemOperand()
658 rm_(NoReg), in MemOperand()
668 rm_(NoReg), in MemOperand()
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| H A D | macro-assembler-aarch32.h | 986 CPURegister reg1 = NoReg, in MacroAssembler()
987 CPURegister reg2 = NoReg, in MacroAssembler()
988 CPURegister reg3 = NoReg, in MacroAssembler()
989 CPURegister reg4 = NoReg); in MacroAssembler()
13430 const Register& reg2 = NoReg, in MacroAssembler()
13431 const Register& reg3 = NoReg, in MacroAssembler()
13432 const Register& reg4 = NoReg) { in MacroAssembler()
13448 const Register& reg2 = NoReg, in MacroAssembler()
13449 const Register& reg3 = NoReg, in MacroAssembler()
13450 const Register& reg4 = NoReg) { in MacroAssembler()
13429 Include(const Register& reg1, const Register& reg2 = NoReg, const Register& reg3 = NoReg, const Register& reg4 = NoReg) MacroAssembler() argument
13447 Exclude(const Register& reg1, const Register& reg2 = NoReg, const Register& reg3 = NoReg, const Register& reg4 = NoReg) MacroAssembler() argument
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| H A D | instructions-aarch32.h | 420 const Register NoReg;
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | register-arm64.h | 440 constexpr Register NoReg = Register::no_reg(); member
443 constexpr Register no_reg = NoReg;
512 // to NoReg are ignored. The system stack pointer may be specified.
515 const CPURegister& reg3 = NoReg, const CPURegister& reg4 = NoReg,
516 const CPURegister& reg5 = NoReg, const CPURegister& reg6 = NoReg,
517 const CPURegister& reg7 = NoReg, const CPURegister& reg8 = NoReg);
521 // specified. Arguments set to NoReg ar
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| H A D | assembler-arm64-inl.h | 239 Operand::Operand(T t) : immediate_(t), reg_(NoReg) {} in Operand()
243 : immediate_(t, rmode), reg_(NoReg) {} in Operand()
271 DCHECK_IMPLIES(heap_object_request_.has_value(), reg_ == NoReg); in IsHeapObjectRequest()
284 return reg_ == NoReg && !IsHeapObjectRequest(); in IsImmediate()
365 : base_(NoReg), in MemOperand()
366 regoffset_(NoReg), in MemOperand()
375 regoffset_(NoReg), in MemOperand()
416 : base_(base), regoffset_(NoReg), addrmode_(addrmode) { in MemOperand()
453 return (addrmode_ == Offset) && regoffset_ == NoReg; in IsImmediateOffset()
457 return (addrmode_ == Offset) && regoffset_ != NoReg; in IsRegisterOffset()
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| H A D | macro-assembler-arm64.h | 500 void B(Label* label, BranchType type, Register reg = NoReg, int bit = -1);
790 // If an argument register is 'NoReg', all further arguments are also assumed
791 // to be 'NoReg', and are thus not pushed or popped.
818 void Push(const CPURegister& src0, const CPURegister& src1 = NoReg,
819 const CPURegister& src2 = NoReg, const CPURegister& src3 = NoReg);
822 const CPURegister& src4, const CPURegister& src5 = NoReg,
823 const CPURegister& src6 = NoReg, const CPURegister& src7 = NoReg);
825 void Pop(const CPURegister& dst0, const CPURegister& dst1 = NoReg,
2178 Include(const Register& reg1, const Register& reg2 = NoReg) Include() argument
2182 Exclude(const Register& reg1, const Register& reg2 = NoReg) Exclude() argument
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| H A D | macro-assembler-arm64.cc | 981 DCHECK((reg == NoReg || type >= kBranchTypeFirstUsingReg) && in B()
1166 PushHelper(2, src.SizeInBytes(), src, src, NoReg, NoReg); in PushMultipleTimes()
1171 PushHelper(1, src.SizeInBytes(), src, NoReg, NoReg, NoReg); in PushMultipleTimes()
3432 CPURegister pcs[kPrintfMaxArgCount] = {NoReg, NoReg, NoReg, NoReg}; in TruncateDoubleToI()
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| H A D | assembler-arm64.cc | 2319 DCHECK(addr.regoffset() != NoReg || addr.offset() == offset); in LoadStoreStructVerify()
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| /third_party/vixl/test/aarch64/ |
| H A D | test-abi.cc | 71 GenericOperand found(NoReg); in TEST()
72 GenericOperand expected(NoReg); in TEST()
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| H A D | test-api-aarch64.cc | 193 VIXL_CHECK(NoReg.Is(NoVReg)); in TEST()
194 VIXL_CHECK(NoVReg.Is(NoReg)); in TEST()
196 VIXL_CHECK(NoVReg.Is(NoReg)); in TEST()
197 VIXL_CHECK(NoReg.Is(NoVReg)); in TEST()
199 VIXL_CHECK(NoReg.Is(NoCPUReg)); in TEST()
200 VIXL_CHECK(NoCPUReg.Is(NoReg)); in TEST()
208 VIXL_CHECK(NoReg.IsNone()); in TEST()
382 VIXL_CHECK(!NoReg.IsValid()); in TEST()
453 VIXL_CHECK(!static_cast<CPURegister>(NoReg).IsValid()); in TEST()
1244 // Including NoReg ha in TEST()
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| H A D | test-utils-aarch64.cc | 552 Register first = NoReg; in Clobber()
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| /third_party/node/deps/v8/src/regexp/arm64/ |
| H A D | regexp-macro-assembler-arm64.cc | 1593 Register result = NoReg; in GetRegister()
|