Home
last modified time | relevance | path

Searched refs:MPU_RLAR_LIMIT_Msk (Results 1 - 7 of 7) sorted by relevance

/third_party/cmsis/CMSIS/Core/Include/m-profile/
H A Darmv8m_mpu.h160 (((LIMIT) & MPU_RLAR_LIMIT_Msk) | \
172 (((LIMIT) & MPU_RLAR_LIMIT_Msk) | \
/third_party/cmsis/CMSIS/Core/Include/
H A Dcore_cm23.h913 #define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ macro
H A Dcore_cm35p.h1513 #define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ macro
H A Dcore_cm33.h1513 #define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ macro
H A Dcore_starmc1.h1610 #define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ macro
H A Dcore_cm85.h2989 #define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ macro
H A Dcore_cm55.h2965 #define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ macro

Completed in 57 milliseconds