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Searched refs:D8 (Results 1 - 25 of 29) sorted by relevance

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/third_party/decimal.js/test/modules/
H A Dclone.js25 var D8 = Decimal.clone(); variable
26 D8.config({ precision: 8 });
40 var x8 = new D8(5);
62 var y8 = new D8(3);
88 t(D8.precision === 8);
105 t(new D8(1).constructor !== new D9(1).constructor);
/third_party/typescript/tests/baselines/reference/
H A DsubtypesOfTypeParameterWithRecursiveConstraints.js97 class D8<T extends Foo<U>, U extends Foo<T>, V extends Foo<V>> extends Base<V> {
149 class D8<T extends Foo<U>, U extends Foo<T>, V extends Foo<V>> extends Base2<V> {
276 var D8 = /** @class */ (function (_super) {
277 __extends(D8, _super);
278 function D8() {
281 return D8;
347 var D8 = /** @class */ (function (_super) {
348 __extends(D8, _super);
349 function D8() {
352 return D8;
[all...]
H A DsubtypesOfTypeParameterWithConstraints4.js71 class D8<T extends Foo, U extends Foo, V> extends B1<U> {
177 var D8 = /** @class */ (function (_super) {
178 __extends(D8, _super);
179 function D8() {
182 return D8;
H A DundefinedIsSubtypeOfEverything.js61 class D8 extends Base {
230 var D8 = /** @class */ (function (_super) {
231 __extends(D8, _super);
232 function D8() {
235 return D8;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
H A DARMFrameLowering.cpp444 if (Reg == ARM::D8) in emitPrologue()
446 if (Reg < ARM::D8 || Reg >= ARM::D8 + AFI->getNumAlignedDPRCS2Regs()) in emitPrologue()
688 (Reg < ARM::D8 || Reg >= ARM::D8 + AFI->getNumAlignedDPRCS2Regs())) { in emitPrologue()
995 if (Reg >= ARM::D8 && Reg < ARM::D8 + NumAlignedDPRCS2Regs) in emitPushInst()
1085 if (Reg >= ARM::D8 && Reg < ARM::D8 + NumAlignedDPRCS2Regs) in emitPopInst()
1177 unsigned DNum = CSI[i].getReg() - ARM::D8; in emitAlignedDPRCS2Spills()
[all...]
H A DARMBaseRegisterInfo.h76 case D11: case D10: case D9: case D8: in isARMArea3Register()
/third_party/node/deps/v8/src/d8/
H A Dd8-js.cc7 const char* v8::Shell::stringify_source_ = R"D8(
101 )D8";
/third_party/FreeBSD/lib/msun/ld128/
H A Ds_expl.c181 D8 = 2.48015873015873015687993712101479612e-5L, variable
255 x * (D7 + x * (D8 + x * (D9 + x * (D10 + in expm1l()
/third_party/backends/backend/
H A Dsnapscan.c352 given D(n/2) and n; n is presumed to be a power of 2. D8 and D16
358 static u_char D4[16], D8[64], D16[256]; variable
773 mkDn (D8, D4, 8); in sane_init()
774 mkDn (D16, D8, 16); in sane_init()
775 /* scale the D8 matrix from 0..63 to 0..255 */ in sane_init()
779 D8[i] = (u_char) (4 * D8[i] + 2); in sane_init()
1550 matrix = D8; in download_halftone_matrices()
1551 matrix_sz = sizeof (D8); in download_halftone_matrices()
1563 if (matrix_sz == sizeof (D8)) in download_halftone_matrices()
[all...]
/third_party/node/deps/v8/src/codegen/ia32/
H A Dsse-instr.h62 V(psubusb, 66, 0F, D8) \
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
H A DHexagonFrameLowering.h87 { Hexagon::R17, -4 }, { Hexagon::R16, -8 }, { Hexagon::D8, -8 },
H A DHexagonFrameLowering.cpp930 Hexagon::D0, Hexagon::D1, Hexagon::D8, Hexagon::D9, in insertCFIInstructionsAt()
2485 // a contiguous block starting from D8. in shouldInlineCSR()
2494 if (F != Hexagon::D8) in shouldInlineCSR()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h119 case AArch64::D8: return AArch64::B8; in getBRegFromDReg()
159 case AArch64::B8: return AArch64::D8; in getDRegFromBReg()
/third_party/mbedtls/library/
H A Daes.c130 V(93, 71, 71, E2), V(73, D8, D8, AB), V(53, 31, 31, 62), V(3F, 15, 15, 2A), \
165 V(B4, 6C, 6C, D8), V(FA, 56, 56, AC), V(07, F4, F4, F3), V(25, EA, EA, CF), \
172 V(D8, 48, 48, 90), V(05, 03, 03, 06), V(01, F6, F6, F7), V(12, 0E, 0E, 1C), \
285 V(C4, 8C, FC, A8), V(1A, 3F, F0, A0), V(D8, 2C, 7D, 56), V(EF, 90, 33, 22), \
289 V(C2, 13, 8D, F6), V(E8, B8, D8, 90), V(5E, F7, 39, 2E), V(F5, AF, C3, 82), \
296 V(37, BC, 4E, 74), V(A6, CA, 82, FC), V(B0, D0, 90, E0), V(15, D8, A7, 33), \
308 V(71, 01, A8, 39), V(DE, B3, 0C, 08), V(9C, E4, B4, D8), V(90, C1, 56, 64), \
/third_party/node/deps/v8/src/codegen/x64/
H A Dsse-instr.h76 V(psubusb, 66, 0F, D8) \
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
H A DAArch64PBQPRegAlloc.cpp116 case AArch64::D8: in isOdd()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/Disassembler/
H A DHexagonDisassembler.cpp587 Hexagon::D8, Hexagon::D9, Hexagon::D10, Hexagon::D11, in DecodeDoubleRegsRegisterClass()
597 Hexagon::D8, Hexagon::D9, Hexagon::D10, Hexagon::D11}; in DecodeGeneralDoubleLow8RegsRegisterClass()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCInstrInfo.cpp248 case D8: in getDuplexRegisterNumbering()
561 (Reg >= Hexagon::D8 && Reg <= Hexagon::D11)); in isDblRegForSubInst()
H A DHexagonMCDuplexInfo.cpp690 case Hexagon::D8: in addOps()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AsmBackend.cpp672 // D8/D9 pair = 0x00000100,
676 if (Reg1 == AArch64::D8 && Reg2 == AArch64::D9 &&
H A DAArch64MCTargetDesc.cpp171 {codeview::RegisterId::ARM64_D8, AArch64::D8}, in initLLVMToCVRegMapping()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/Disassembler/
H A DSparcDisassembler.cpp85 SP::D8, SP::D24, SP::D9, SP::D25,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMAsmBackend.cpp1254 static unsigned FPRCSRegs[] = { ARM::D8, ARM::D10, ARM::D12, ARM::D14 }; in generateCompactUnwindEncoding()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp151 Sparc::D8, Sparc::D9, Sparc::D10, Sparc::D11,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp335 AArch64::D5, AArch64::D6, AArch64::D7, AArch64::D8, AArch64::D9,

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