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Searched refs:D7 (Results 1 - 23 of 23) sorted by relevance

/third_party/typescript/tests/baselines/reference/
H A DundefinedIsSubtypeOfEverything.js56 class D7 extends Base {
62 foo: D7;
223 var D7 = /** @class */ (function (_super) {
224 __extends(D7, _super);
225 function D7() {
228 return D7;
H A DsubtypesOfTypeParameterWithRecursiveConstraints.js92 class D7<T extends Foo<U>, U extends Foo<T>, V extends Foo<V>> extends Base<V> {
144 class D7<T extends Foo<U>, U extends Foo<T>, V extends Foo<V>> extends Base2<V> {
269 var D7 = /** @class */ (function (_super) {
270 __extends(D7, _super);
271 function D7() {
274 return D7;
340 var D7 = /** @class */ (function (_super) {
341 __extends(D7, _super);
342 function D7() {
345 return D7;
[all...]
H A DsubtypesOfTypeParameterWithConstraints4.js66 class D7<T extends Foo, U extends Foo, V> extends B1<U> {
170 var D7 = /** @class */ (function (_super) {
171 __extends(D7, _super);
172 function D7() {
175 return D7;
/third_party/decimal.js/test/modules/
H A Dclone.js24 var D7 = Decimal.clone({ precision: 7 }); variable
39 var x7 = new D7(5);
61 var y7 = new D7(3);
89 t(D7.precision === 7);
/third_party/FreeBSD/lib/msun/ld128/
H A Ds_expl.c180 D7 = 1.98412698412698412699085805424661471e-4L, variable
255 x * (D7 + x * (D8 + x * (D9 + x * (D10 + in expm1l()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.cpp34 AArch64::D6, AArch64::D7};
H A DAArch64PBQPRegAlloc.cpp66 case AArch64::D7: in isOdd()
H A DAArch64FastISel.cpp3016 AArch64::D5, AArch64::D6, AArch64::D7 }, in fastLowerArguments()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.h77 case D7: case D6: case D5: case D4: in isARMArea3Register()
H A DARMCallingConv.cpp163 ARM::D4, ARM::D5, ARM::D6, ARM::D7 };
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h118 case AArch64::D7: return AArch64::B7; in getBRegFromDReg()
158 case AArch64::B7: return AArch64::D7; in getDRegFromBReg()
/third_party/mbedtls/library/
H A Daes.c122 V(19, FE, FE, E7), V(62, D7, D7, B5), V(E6, AB, AB, 4D), V(9A, 76, 76, EC), \
144 V(C5, 43, 43, 86), V(D7, 4D, 4D, 9A), V(55, 33, 33, 66), V(94, 85, 85, 11), \
180 V(DA, BF, BF, 65), V(31, E6, E6, D7), V(C6, 42, 42, 84), V(B8, 68, 68, D0), \
249 V(FC, D7, E5, 4F), V(D7, CB, 2A, C5), V(80, 44, 35, 26), V(8F, A3, 62, B5), \
281 V(CA, DC, 31, D7), V(10, 85, 63, 42), V(40, 22, 97, 13), V(20, 11, C6, 84), \
302 V(8C, 61, D7, 9A), V(7A, 0C, A1, 37), V(8E, 14, F8, 59), V(89, 3C, 13, EB), \
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp63 D0, D1, D2, D3, D4, D5, D6, D7, 0 in getCallerSavedRegs()
H A DHexagonISelLowering.cpp282 .Case("r15:14", Hexagon::D7) in getRegisterByName()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCTargetDesc.cpp170 {codeview::RegisterId::ARM64_D7, AArch64::D7}, in initLLVMToCVRegMapping()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/Disassembler/
H A DSparcDisassembler.cpp84 SP::D6, SP::D22, SP::D7, SP::D23,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp1178 VA.convertToReg(Mips::D7); in processCallArgs()
1337 std::array<MCPhysReg, 2> AFGR64ArgRegs = {{Mips::D6, Mips::D7}}; in fastLowerArguments()
H A DMipsISelLowering.cpp2969 static const MCPhysReg F64Regs[] = { Mips::D6, Mips::D7 }; in CC_MipsO32_FP32()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/Disassembler/
H A DHexagonDisassembler.cpp586 Hexagon::D4, Hexagon::D5, Hexagon::D6, Hexagon::D7, in DecodeDoubleRegsRegisterClass()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp150 Sparc::D4, Sparc::D5, Sparc::D6, Sparc::D7,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp335 AArch64::D5, AArch64::D6, AArch64::D7, AArch64::D8, AArch64::D9,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp1317 ARM::D4, ARM::D5, ARM::D6, ARM::D7,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp3238 case Mips::D7: return Mips::F15; in nextReg()

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