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Searched refs:D5 (Results 1 - 25 of 26) sorted by relevance

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/third_party/typescript/tests/baselines/reference/
H A DsubtypesOfTypeParameterWithRecursiveConstraints.js82 class D5<T extends Foo<U>, U extends Foo<T>, V extends Foo<V>> extends Base<U> {
134 class D5<T extends Foo<U>, U extends Foo<T>, V extends Foo<V>> extends Base2<U> {
255 var D5 = /** @class */ (function (_super) {
256 __extends(D5, _super);
257 function D5() {
260 return D5;
326 var D5 = /** @class */ (function (_super) {
327 __extends(D5, _super);
328 function D5() {
331 return D5;
[all...]
H A DsubtypesOfTypeParameterWithConstraints4.js56 class D5<T extends Foo, U extends Foo, V> extends B1<T> {
156 var D5 = /** @class */ (function (_super) {
157 __extends(D5, _super);
158 function D5() {
161 return D5;
H A DundefinedIsSubtypeOfEverything.js47 class D5 extends Base {
209 var D5 = /** @class */ (function (_super) {
210 __extends(D5, _super);
211 function D5() {
214 return D5;
/third_party/decimal.js/test/modules/
H A Dclone.js22 var D5 = Decimal.clone({ precision: 5 }); variable
37 var x5 = new D5(5);
59 var y5 = new D5(3);
91 t(D5.precision === 5);
97 t(new Decimal(9.99).eq(new D5('9.99')));
/third_party/node/deps/openssl/openssl/crypto/chacha/asm/
H A Dchacha-armv8.pl810 $A3,$B3,$C3,$D3,$A4,$B4,$C4,$D4,$A5,$B5,$C5,$D5) = map("v$_.4s",(8..31));
929 add $D5,$D1,$ONE // +4
951 my @thread5=&NEONROUND($A5,$B5,$C5,$D5,$T5,0);
970 @thread5=&NEONROUND($A5,$B5,$C5,$D5,$T5,1);
1065 @thread5=&NEONROUND($A5,$B5,$C5,$D5,$T5,0);
1082 @thread5=&NEONROUND($A5,$B5,$C5,$D5,$T5,1);
1130 add $D5,$D5,$ONE // +4
1142 add $D5,$D5,
[all...]
/third_party/openssl/crypto/chacha/asm/
H A Dchacha-armv8.pl814 $A3,$B3,$C3,$D3,$A4,$B4,$C4,$D4,$A5,$B5,$C5,$D5) = map("v$_.4s",(8..31));
934 add $D5,$D1,$ONE // +4
956 my @thread5=&NEONROUND($A5,$B5,$C5,$D5,$T5,0);
975 @thread5=&NEONROUND($A5,$B5,$C5,$D5,$T5,1);
1070 @thread5=&NEONROUND($A5,$B5,$C5,$D5,$T5,0);
1087 @thread5=&NEONROUND($A5,$B5,$C5,$D5,$T5,1);
1135 add $D5,$D5,$ONE // +4
1147 add $D5,$D5,
[all...]
/third_party/FreeBSD/lib/msun/ld128/
H A Ds_expl.c178 D5 = 8.33333333333333333333333364022244481e-3L, variable
254 q = x * x2 * D3 + x2 * x2 * (D4 + x * (D5 + x * (D6 + in expm1l()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.cpp33 AArch64::D3, AArch64::D4, AArch64::D5,
H A DAArch64PBQPRegAlloc.cpp65 case AArch64::D5: in isOdd()
H A DAArch64FastISel.cpp3016 AArch64::D5, AArch64::D6, AArch64::D7 }, in fastLowerArguments()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.h77 case D7: case D6: case D5: case D4: in isARMArea3Register()
H A DARMCallingConv.cpp163 ARM::D4, ARM::D5, ARM::D6, ARM::D7 };
/third_party/node/deps/v8/src/codegen/ia32/
H A Dsse-instr.h41 V(pmullw, 66, 0F, D5) \
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h116 case AArch64::D5: return AArch64::B5; in getBRegFromDReg()
156 case AArch64::B5: return AArch64::D5; in getDRegFromBReg()
/third_party/mbedtls/library/
H A Daes.c163 V(32, E7, E7, D5), V(43, C8, C8, 8B), V(59, 37, 37, 6E), V(B7, 6D, 6D, DA), \
164 V(8C, 8D, 8D, 01), V(64, D5, D5, B1), V(D2, 4E, 4E, 9C), V(E0, A9, A9, 49), \
167 V(D5, BA, BA, 6F), V(88, 78, 78, F0), V(6F, 25, 25, 4A), V(72, 2E, 2E, 5C), \
263 V(CD, F4, DA, 65), V(D5, BE, 05, 06), V(1F, 62, 34, D1), V(8A, FE, A6, C4), \
272 V(FB, FF, 0E, FD), V(56, 38, 85, 0F), V(1E, D5, AE, 3D), V(27, 39, 2D, 36), \
290 V(BE, 80, 5D, 9F), V(7C, 93, D0, 69), V(A9, 2D, D5, 6F), V(B3, 12, 25, CF), \
309 V(61, 84, CB, 7B), V(70, B6, 32, D5), V(74, 5C, 6C, 48), V(42, 57, B8, D0)
/third_party/node/deps/v8/src/codegen/x64/
H A Dsse-instr.h75 V(pmullw, 66, 0F, D5) \
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp63 D0, D1, D2, D3, D4, D5, D6, D7, 0 in getCallerSavedRegs()
H A DHexagonISelLowering.cpp280 .Case("r11:10", Hexagon::D5) in getRegisterByName()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCTargetDesc.cpp168 {codeview::RegisterId::ARM64_D5, AArch64::D5}, in initLLVMToCVRegMapping()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/Disassembler/
H A DSparcDisassembler.cpp83 SP::D4, SP::D20, SP::D5, SP::D21,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/Disassembler/
H A DHexagonDisassembler.cpp586 Hexagon::D4, Hexagon::D5, Hexagon::D6, Hexagon::D7, in DecodeDoubleRegsRegisterClass()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp150 Sparc::D4, Sparc::D5, Sparc::D6, Sparc::D7,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp335 AArch64::D5, AArch64::D6, AArch64::D7, AArch64::D8, AArch64::D9,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp1317 ARM::D4, ARM::D5, ARM::D6, ARM::D7,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp3236 case Mips::D5: return Mips::F11; in nextReg()

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