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/third_party/rust/crates/aho-corasick/src/
H A Dclasses.rs3 /// A representation of byte oriented equivalence classes.
12 /// Creates a new set of equivalence classes where all bytes are mapped to
18 /// Creates a new set of equivalence classes where each byte belongs to
21 let mut classes = ByteClasses::empty(); in singletons() variables
23 classes.set(i as u8, i as u8); in singletons()
25 classes in singletons()
43 /// these equivalence classes. Equivalently, this returns the total number
44 /// of equivalence classes.
51 /// equivalence class. Equivalently, there are 256 equivalence classes
60 /// equivalent to the number of equivalence classes
177 let mut classes = ByteClasses::empty(); build() variables
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/third_party/python/Modules/_ctypes/libffi_osx/x86/
H A Dx86-ffi64.c52 /* All reference to register classes here is identical to the code in
56 These represent classes as documented by the PS ABI, with the exception
57 of SSESF, SSEDF classes, that are basically SSE class, just gcc will
91 /* Rule #1: If both classes are equal, this is the resulting class. */ in merge_classes()
95 /* Rule #2: If one of the classes is NO_CLASS, the resulting class is in merge_classes()
103 /* Rule #3: If one of the classes is MEMORY, the result is MEMORY. */ in merge_classes()
107 /* Rule #4: If one of the classes is INTEGER, the result is INTEGER. */ in merge_classes()
116 /* Rule #5: If one of the classes is X87, X87UP, or COMPLEX_X87 class, in merge_classes()
134 sized containers, classes[0] will be NO_CLASS and 1 is returned.
141 enum x86_64_reg_class classes[], in classify_argument()
139 classify_argument( ffi_type* type, enum x86_64_reg_class classes[], size_t byte_offset) classify_argument() argument
304 examine_argument( ffi_type* type, enum x86_64_reg_class classes[MAX_CLASSES], _Bool in_return, int* pngpr, int* pnsse) examine_argument() argument
363 enum x86_64_reg_class classes[MAX_CLASSES]; ffi_prep_cif_machdep() local
438 enum x86_64_reg_class classes[MAX_CLASSES]; ffi_call() local
641 enum x86_64_reg_class classes[MAX_CLASSES]; ffi_closure_unix64_inner() local
671 enum x86_64_reg_class classes[MAX_CLASSES]; ffi_closure_unix64_inner() local
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/third_party/typescript/tests/baselines/reference/
H A DtypeCheckObjectCreationExpressionWithUndefinedCallResolutionData.js5 var classes = undefined;
6 return new classes(null);
19 var classes = undefined;
20 return new classes(null);
H A DjsDeclarationsReactComponents.js88 classes: PropTypes.object,
92 classes: {},
178 classes: prop_types_1.default.object,
181 classes: {},
238 const classes: PropTypes.Requireable<object>;
242 export { classes_1 as classes };
/third_party/mesa3d/src/util/
H A Dregister_allocate.c55 * In this system, there are register classes each containing various
154 * This can simplify code for setting up multiple register classes
198 * This can simplify code for setting up multiple register classes
221 regs->classes = reralloc(regs->regs, regs->classes, struct ra_class *, in ra_alloc_reg_class()
229 regs->classes[class->index] = class; in ra_alloc_reg_class()
257 return regs->classes[class]; in ra_get_class_from_index()
286 * Must be called after all conflicts and register classes have been
297 regs->classes[b]->q = ralloc_array(regs, unsigned int, regs->class_count); in ra_set_finalize()
303 regs->classes[ in ra_set_finalize()
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/third_party/skia/third_party/externals/spirv-tools/test/tools/
H A Dspirv_test_framework.py77 * A Base class precedes its derived classes, e.g., for "class B(A)", it
79 * When there are multiple base classes, base classes declared first
83 classes = []
86 if c is not object and c not in classes:
87 classes.append(c)
89 if superclass is not object and superclass not in classes:
90 classes.append(superclass)
92 return classes
106 classes
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/third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/test/tools/
H A Dspirv_test_framework.py77 * A Base class precedes its derived classes, e.g., for "class B(A)", it
79 * When there are multiple base classes, base classes declared first
83 classes = []
86 if c is not object and c not in classes:
87 classes.append(c)
89 if superclass is not object and superclass not in classes:
90 classes.append(superclass)
92 return classes
106 classes
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/third_party/spirv-tools/test/tools/
H A Dspirv_test_framework.py77 * A Base class precedes its derived classes, e.g., for "class B(A)", it
79 * When there are multiple base classes, base classes declared first
83 classes = []
86 if c is not object and c not in classes:
87 classes.append(c)
89 if superclass is not object and superclass not in classes:
90 classes.append(superclass)
92 return classes
106 classes
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/third_party/skia/third_party/externals/abseil-cpp/absl/hash/
H A Dhash_testing.h201 std::vector<EqClass> classes; in VerifyTypeImplementsAbslHashCorrectly()
203 // Gather the values in equivalence classes. in VerifyTypeImplementsAbslHashCorrectly()
207 for (auto& eqclass : classes) { in VerifyTypeImplementsAbslHashCorrectly()
214 classes.emplace_back(); in VerifyTypeImplementsAbslHashCorrectly()
215 c = &classes.back(); in VerifyTypeImplementsAbslHashCorrectly()
226 if (classes.size() < 2) { in VerifyTypeImplementsAbslHashCorrectly()
228 << "At least two equivalence classes are expected."; in VerifyTypeImplementsAbslHashCorrectly()
234 for (const auto& c : classes) { in VerifyTypeImplementsAbslHashCorrectly()
251 // Elements from other classes must have different hash expansion. in VerifyTypeImplementsAbslHashCorrectly()
252 for (const auto& c2 : classes) { in VerifyTypeImplementsAbslHashCorrectly()
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/third_party/rust/crates/regex/src/
H A Dcompile.rs43 // memory allocated by Unicode character classes ('InstRanges'). Second is
1185 // `(0..256).collect()`, which effectively removes the byte classes in byte_classes()
1229 let classes = set.byte_classes(); in byte_classes()
1230 assert_eq!(classes[0], 0); in byte_classes()
1231 assert_eq!(classes[1], 0); in byte_classes()
1232 assert_eq!(classes[2], 0); in byte_classes()
1233 assert_eq!(classes[b'a' as usize - 1], 0); in byte_classes()
1234 assert_eq!(classes[b'a' as usize], 1); in byte_classes()
1235 assert_eq!(classes[b'm' as usize], 1); in byte_classes()
1236 assert_eq!(classes[ in byte_classes()
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/third_party/libdrm/tests/tegra/
H A Dsyncpt-timeout.c39 } classes[] = { in channel_open() local
46 for (i = 0; i < ARRAY_SIZE(classes); i++) { in channel_open()
47 err = drm_tegra_channel_open(drm, classes[i].class, channel); in channel_open()
50 classes[i].name, strerror(-err)); in channel_open()
H A Dsyncpt-wait.c39 } classes[] = { in channel_open() local
46 for (i = 0; i < ARRAY_SIZE(classes); i++) { in channel_open()
47 err = drm_tegra_channel_open(drm, classes[i].class, channel); in channel_open()
50 classes[i].name, strerror(-err)); in channel_open()
/third_party/toybox/toys/other/
H A Dionice.c74 char *classes[] = {"none", "rt", "be", "idle"}; in iorenice_main() local
83 xprintf("Pid %ld, class %s (%ld), prio %d\n", TT.p, classes[TT.c], TT.c, p); in iorenice_main()
88 if (!strcmp(toys.optargs[toys.optc-1], classes[TT.c])) break; in iorenice_main()
/third_party/mesa3d/src/gallium/drivers/r300/compiler/
H A Dradeon_pair_regalloc.c288 const struct rc_class * classes, in find_class()
295 if (classes[i].WritemaskCount > max_writemask_count) { in find_class()
299 if (classes[i].Writemasks[j] == writemask) { in find_class()
328 const struct rc_class * classes) in variable_get_class()
350 class_index = find_class(classes, writemask, 3); in variable_get_class()
354 c = classes[class_index]; in variable_get_class()
435 class_index = find_class(classes, writemask, in variable_get_class()
439 return classes[class_index].ID; in variable_get_class()
539 node_classes[node_index] = ra_state->classes[class_index]; in do_advanced_regalloc()
699 /* Create the register classes */ in rc_init_regalloc_state()
287 find_class( const struct rc_class * classes, unsigned int writemask, unsigned int max_writemask_count) find_class() argument
326 variable_get_class( struct rc_variable * variable, const struct rc_class * classes) variable_get_class() argument
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/third_party/python/Lib/test/
H A Dtest_finalization.py359 def build_chain(self, classes):
360 nodes = [cls() for cls in classes]
365 def check_non_resurrecting_chain(self, classes):
366 N = len(classes)
368 nodes = self.build_chain(classes)
379 def check_resurrecting_chain(self, classes):
380 N = len(classes)
382 nodes = self.build_chain(classes)
/third_party/vk-gl-cts/external/vulkan-docs/src/scripts/
H A Dmap_html_anchors.py62 classes = idelem.get('class')
63 if classes is not None:
64 divclass = classes.split()
67 # <div> classes with no title elements (paragraphs or NOTEs)
73 # <div> classes with titles in the text of the first
87 # <div> classes with titles in the first
97 print(f'Cannot find title for <div id="{id}" class="{classes}"> - unrecognized class', file=sys.stderr)
/third_party/rust/crates/aho-corasick/aho-corasick-debug/
H A Dmain.rs51 classes: bool,
88 .arg(Arg::with_name("classes").long("classes").short("c")) in parse()
112 classes: parsed.is_present("classes"), in parse()
125 // TODO: remove when byte classes and premultiply options are removed. in automaton()
133 .byte_classes(self.classes) in automaton()
/third_party/python/Lib/test/libregrtest/
H A Druntest_mp.py526 classes = {TestResult}
527 while len(classes) > prev_count:
528 prev_count = len(classes)
530 for cls in classes:
532 classes.update(to_add)
533 return classes
/third_party/wpa_supplicant/wpa_supplicant-2.9/src/p2p/
H A Dp2p_utils.c384 int p2p_channel_select(struct p2p_channels *chans, const int *classes, in p2p_channel_select() argument
389 for (j = 0; classes == NULL || classes[j]; j++) { in p2p_channel_select()
396 if (classes == NULL || c->reg_class == classes[j]) { in p2p_channel_select()
407 if (classes == NULL) in p2p_channel_select()
/third_party/wpa_supplicant/wpa_supplicant-2.9_standard/src/p2p/
H A Dp2p_utils.c402 int p2p_channel_select(struct p2p_channels *chans, const int *classes, in p2p_channel_select() argument
407 for (j = 0; classes == NULL || classes[j]; j++) { in p2p_channel_select()
414 if (classes == NULL || c->reg_class == classes[j]) { in p2p_channel_select()
425 if (classes == NULL) in p2p_channel_select()
/third_party/ffmpeg/libavcodec/
H A Dvorbisenc.c72 vorbis_enc_floor_class *classes; member
343 fc->classes = av_calloc(fc->nclasses, sizeof(vorbis_enc_floor_class)); in create_vorbis_context()
344 if (!fc->classes) in create_vorbis_context()
347 vorbis_enc_floor_class * c = &fc->classes[i]; in create_vorbis_context()
364 fc->values += fc->classes[fc->partition_to_class[i]].dim; in create_vorbis_context()
568 put_bits(pb, 3, fc->classes[i].dim - 1); in put_floor_header()
569 put_bits(pb, 2, fc->classes[i].subclass); in put_floor_header()
571 if (fc->classes[i].subclass) in put_floor_header()
572 put_bits(pb, 8, fc->classes[i].masterbook); in put_floor_header()
574 books = (1 << fc->classes[ in put_floor_header()
918 int classes[MAX_CHANNELS][NUM_RESIDUE_PARTITIONS]; residue_encode() local
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/third_party/mesa3d/src/intel/compiler/
H A Dbrw_fs_reg_allocate.cpp124 struct ra_class **classes = ralloc_array(compiler, struct ra_class *, class_count); in brw_alloc_reg_set() local
127 /* Now, make the register classes for each size of contiguous register in brw_alloc_reg_set()
131 classes[i] = ra_alloc_contig_reg_class(regs, class_sizes[i]); in brw_alloc_reg_set()
145 ra_class_add_reg(classes[i], reg); in brw_alloc_reg_set()
148 ra_class_add_reg(classes[i], reg); in brw_alloc_reg_set()
167 for (unsigned i = 0; i < ARRAY_SIZE(compiler->fs_reg_sets[index].classes); i++) in brw_alloc_reg_set()
168 compiler->fs_reg_sets[index].classes[i] = NULL; in brw_alloc_reg_set()
170 compiler->fs_reg_sets[index].classes[class_sizes[i] - 1] = classes[i]; in brw_alloc_reg_set()
686 * The alternative would be to have per-physical-register classes, in build_interference_graph()
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H A Dbrw_vec4_reg_allocate.cpp100 * SEND-from-GRF sources cannot be split, so we also need classes for each in brw_vec4_alloc_reg_set()
114 ralloc_free(compiler->vec4_reg_set.classes); in brw_vec4_alloc_reg_set()
115 compiler->vec4_reg_set.classes = ralloc_array(compiler, struct ra_class *, class_count); in brw_vec4_alloc_reg_set()
117 /* Now, add the registers to their classes, and add the conflicts in brw_vec4_alloc_reg_set()
122 compiler->vec4_reg_set.classes[i] = in brw_vec4_alloc_reg_set()
126 ra_class_add_reg(compiler->vec4_reg_set.classes[i], j); in brw_vec4_alloc_reg_set()
142 * The alternative would be to have per-physical register classes, which in setup_payload_interference()
180 ra_set_node_class(g, i, compiler->vec4_reg_set.classes[size - 1]); in reg_allocate()
222 * regs in the register classes back down to real hardware reg in reg_allocate()
/third_party/mesa3d/src/gallium/drivers/etnaviv/
H A Detnaviv_compiler_nir_ra.c90 /* classes always be created from index 0, so equal to the class enum in etna_ra_setup()
93 struct ra_class *classes[NUM_REG_CLASSES]; in etna_ra_setup() local
95 classes[c] = ra_alloc_reg_class(regs); in etna_ra_setup()
98 ra_class_add_reg(classes[reg_get_class(r)], r); in etna_ra_setup()
143 /* set classes from num_components */ in etna_ra_assign()
/third_party/selinux/checkpolicy/test/
H A Ddismod.c63 "classes", "roles ", "types ", "users ", "bools ",
462 static void display_class_set(ebitmap_t *classes, policydb_t *p, FILE *fp) in display_class_set() argument
466 for (i = ebitmap_startbit(classes); i < ebitmap_length(classes); i++) { in display_class_set()
467 if (!ebitmap_get_bit(classes, i)) in display_class_set()
476 for (i = ebitmap_startbit(classes); i < ebitmap_length(classes); i++) { in display_class_set()
477 if (ebitmap_get_bit(classes, i)) in display_class_set()
492 display_class_set(&tr->classes, p, fp); in display_role_trans()
716 fprintf(out_fp, "Allow unknown classes an in display_handle_unknown()
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