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Help
Searched
refs:zynq_clkc_base
(Results
1 - 2
of
2
) sorted by relevance
/kernel/linux/linux-5.10/drivers/clk/zynq/
H
A
D
clkc.c
19
static void __iomem *
zynq_clkc_base
;
variable
21
#define SLCR_ARMPLL_CTRL (
zynq_clkc_base
+ 0x00)
22
#define SLCR_DDRPLL_CTRL (
zynq_clkc_base
+ 0x04)
23
#define SLCR_IOPLL_CTRL (
zynq_clkc_base
+ 0x08)
24
#define SLCR_PLL_STATUS (
zynq_clkc_base
+ 0x0c)
25
#define SLCR_ARM_CLK_CTRL (
zynq_clkc_base
+ 0x20)
26
#define SLCR_DDR_CLK_CTRL (
zynq_clkc_base
+ 0x24)
27
#define SLCR_DCI_CLK_CTRL (
zynq_clkc_base
+ 0x28)
28
#define SLCR_APER_CLK_CTRL (
zynq_clkc_base
+ 0x2c)
29
#define SLCR_GEM0_CLK_CTRL (
zynq_clkc_base
[all...]
/kernel/linux/linux-6.6/drivers/clk/zynq/
H
A
D
clkc.c
19
static void __iomem *
zynq_clkc_base
;
variable
21
#define SLCR_ARMPLL_CTRL (
zynq_clkc_base
+ 0x00)
22
#define SLCR_DDRPLL_CTRL (
zynq_clkc_base
+ 0x04)
23
#define SLCR_IOPLL_CTRL (
zynq_clkc_base
+ 0x08)
24
#define SLCR_PLL_STATUS (
zynq_clkc_base
+ 0x0c)
25
#define SLCR_ARM_CLK_CTRL (
zynq_clkc_base
+ 0x20)
26
#define SLCR_DDR_CLK_CTRL (
zynq_clkc_base
+ 0x24)
27
#define SLCR_DCI_CLK_CTRL (
zynq_clkc_base
+ 0x28)
28
#define SLCR_APER_CLK_CTRL (
zynq_clkc_base
+ 0x2c)
29
#define SLCR_GEM0_CLK_CTRL (
zynq_clkc_base
[all...]
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