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Searched refs:ver_sync_end (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/drivers/video/fbdev/via/
H A Dvia_modesetting.c33 raw.ver_sync_end = timing->ver_sync_end - 1; in via_set_primary_timing()
56 via_write_reg_mask(VIACR, 0x11, raw.ver_sync_end & 0x0F, 0x0F); in via_set_primary_timing()
91 raw.ver_sync_end = timing->ver_sync_end - 1; in via_set_secondary_timing()
117 via_write_reg(VIACR, 0x5F, (raw.ver_sync_end & 0x1F) in via_set_secondary_timing()
H A Dvia_modesetting.h33 u16 ver_sync_end; member
H A Dhw.c1469 timing.ver_sync_end = timing.ver_sync_start + var->vsync_len; in var_to_timing()
1470 timing.ver_total = timing.ver_sync_end + var->upper_margin + dy; in var_to_timing()
/kernel/linux/linux-6.6/drivers/video/fbdev/via/
H A Dvia_modesetting.c33 raw.ver_sync_end = timing->ver_sync_end - 1; in via_set_primary_timing()
56 via_write_reg_mask(VIACR, 0x11, raw.ver_sync_end & 0x0F, 0x0F); in via_set_primary_timing()
91 raw.ver_sync_end = timing->ver_sync_end - 1; in via_set_secondary_timing()
117 via_write_reg(VIACR, 0x5F, (raw.ver_sync_end & 0x1F) in via_set_secondary_timing()
H A Dvia_modesetting.h33 u16 ver_sync_end; member
H A Dhw.c1469 timing.ver_sync_end = timing.ver_sync_start + var->vsync_len; in var_to_timing()
1470 timing.ver_total = timing.ver_sync_end + var->upper_margin + dy; in var_to_timing()

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