| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdkfd/ |
| H A D | kfd_packet_manager_v9.c | 58 packet->sq_shader_tba_hi = upper_32_bits(qpd->tba_addr >> 8) in pm_map_process_v9()
62 packet->sq_shader_tma_hi = upper_32_bits(qpd->tma_addr >> 8); in pm_map_process_v9()
66 packet->gds_addr_hi = upper_32_bits(qpd->gds_context_area); in pm_map_process_v9()
71 upper_32_bits(vm_page_table_base_addr); in pm_map_process_v9()
109 packet->ib_base_hi = upper_32_bits(ib); in pm_runlist_v9()
134 packet->gws_mask_hi = upper_32_bits(res->gws_mask); in pm_set_resources_v9()
137 packet->queue_mask_hi = upper_32_bits(res->queue_mask); in pm_set_resources_v9()
198 upper_32_bits(q->gart_mqd_addr); in pm_map_queues_v9()
204 upper_32_bits((uint64_t)q->properties.write_ptr); in pm_map_queues_v9()
303 packet->addr_hi = upper_32_bits((uint64_ in pm_query_status_v9()
[all...] |
| H A D | kfd_packet_manager_vi.c | 69 packet->gds_addr_hi = upper_32_bits(qpd->gds_context_area); in pm_map_process_vi()
108 packet->bitfields3.ib_base_hi = upper_32_bits(ib); in pm_runlist_vi()
133 packet->gws_mask_hi = upper_32_bits(res->gws_mask); in pm_set_resources_vi()
136 packet->queue_mask_hi = upper_32_bits(res->queue_mask); in pm_set_resources_vi()
188 upper_32_bits(q->gart_mqd_addr); in pm_map_queues_vi()
194 upper_32_bits((uint64_t)q->properties.write_ptr); in pm_map_queues_vi()
282 packet->addr_hi = upper_32_bits((uint64_t)fence_address); in pm_query_status_vi()
284 packet->data_hi = upper_32_bits((uint64_t)fence_value); in pm_query_status_vi()
312 packet->address_hi = upper_32_bits(gpu_addr); in pm_release_mem_vi()
|
| H A D | kfd_mqd_manager_vi.c | 116 m->cp_mqd_base_addr_hi = upper_32_bits(addr); in init_mqd()
130 m->compute_tba_hi = upper_32_bits(q->tba_addr >> 8); in init_mqd()
132 m->compute_tma_hi = upper_32_bits(q->tma_addr >> 8); in init_mqd()
143 upper_32_bits(q->ctx_save_restore_area_address); in init_mqd()
184 m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); in __update_mqd()
187 m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr); in __update_mqd()
189 m->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits((uint64_t)q->write_ptr); in __update_mqd()
216 upper_32_bits(q->eop_ring_buffer_address >> 8); in __update_mqd()
357 m->sdmax_rlcx_rb_base_hi = upper_32_bits(q->queue_address >> 8); in update_mqd_sdma()
359 m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits((uint64_ in update_mqd_sdma()
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdkfd/ |
| H A D | kfd_packet_manager_v9.c | 68 packet->sq_shader_tba_hi = upper_32_bits(qpd->tba_addr >> 8) in pm_map_process_v9()
72 packet->sq_shader_tma_hi = upper_32_bits(qpd->tma_addr >> 8); in pm_map_process_v9()
76 packet->gds_addr_hi = upper_32_bits(qpd->gds_context_area); in pm_map_process_v9()
81 upper_32_bits(vm_page_table_base_addr); in pm_map_process_v9()
124 packet->sq_shader_tba_hi = upper_32_bits(qpd->tba_addr >> 8); in pm_map_process_aldebaran()
126 packet->sq_shader_tma_hi = upper_32_bits(qpd->tma_addr >> 8); in pm_map_process_aldebaran()
130 packet->gds_addr_hi = upper_32_bits(qpd->gds_context_area); in pm_map_process_aldebaran()
135 upper_32_bits(vm_page_table_base_addr); in pm_map_process_aldebaran()
173 packet->ib_base_hi = upper_32_bits(ib); in pm_runlist_v9()
198 packet->gws_mask_hi = upper_32_bits(re in pm_set_resources_v9()
[all...] |
| H A D | kfd_packet_manager_vi.c | 70 packet->gds_addr_hi = upper_32_bits(qpd->gds_context_area); in pm_map_process_vi()
109 packet->bitfields3.ib_base_hi = upper_32_bits(ib); in pm_runlist_vi()
134 packet->gws_mask_hi = upper_32_bits(res->gws_mask); in pm_set_resources_vi()
137 packet->queue_mask_hi = upper_32_bits(res->queue_mask); in pm_set_resources_vi()
189 upper_32_bits(q->gart_mqd_addr); in pm_map_queues_vi()
195 upper_32_bits((uint64_t)q->properties.write_ptr); in pm_map_queues_vi()
263 packet->addr_hi = upper_32_bits((uint64_t)fence_address); in pm_query_status_vi()
265 packet->data_hi = upper_32_bits((uint64_t)fence_value); in pm_query_status_vi()
293 packet->address_hi = upper_32_bits(gpu_addr); in pm_release_mem_vi()
|
| H A D | kfd_mqd_manager_vi.c | 117 m->cp_mqd_base_addr_hi = upper_32_bits(addr); in init_mqd()
131 m->compute_tba_hi = upper_32_bits(q->tba_addr >> 8); in init_mqd()
133 m->compute_tma_hi = upper_32_bits(q->tma_addr >> 8); in init_mqd()
144 upper_32_bits(q->ctx_save_restore_area_address); in init_mqd()
185 m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); in __update_mqd()
188 m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr); in __update_mqd()
190 m->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits((uint64_t)q->write_ptr); in __update_mqd()
217 upper_32_bits(q->eop_ring_buffer_address >> 8); in __update_mqd()
371 m->sdmax_rlcx_rb_base_hi = upper_32_bits(q->queue_address >> 8); in update_mqd_sdma()
373 m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits((uint64_ in update_mqd_sdma()
[all...] |
| H A D | kfd_mqd_manager_v11.c | 160 m->cp_mqd_base_addr_hi = upper_32_bits(addr); in init_mqd()
189 upper_32_bits(q->ctx_save_restore_area_address); in init_mqd()
231 m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); in update_mqd()
234 m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr); in update_mqd()
236 m->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits((uint64_t)q->write_ptr); in update_mqd()
258 upper_32_bits(q->eop_ring_buffer_address >> 8); in update_mqd()
435 m->sdmax_rlcx_rb_base_hi = upper_32_bits(q->queue_address >> 8); in update_mqd_sdma()
437 m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits((uint64_t)q->read_ptr); in update_mqd_sdma()
439 m->sdmax_rlcx_rb_wptr_poll_addr_hi = upper_32_bits((uint64_t)q->write_ptr); in update_mqd_sdma()
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| H A D | si_dma.c | 83 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_copy_pages()
84 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff; in si_dma_vm_copy_pages()
122 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_write_pages()
134 ib->ptr[ib->length_dw++] = upper_32_bits(value); in si_dma_vm_write_pages()
174 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_set_pages()
178 ib->ptr[ib->length_dw++] = upper_32_bits(value); in si_dma_vm_set_pages()
266 radeon_ring_write(ring, upper_32_bits(dst_offset) & 0xff); in si_copy_dma()
267 radeon_ring_write(ring, upper_32_bits(src_offset) & 0xff); in si_copy_dma()
|
| H A D | evergreen_dma.c | 49 radeon_ring_write(ring, (upper_32_bits(addr) & 0xff)); in evergreen_dma_fence_ring_emit()
79 radeon_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xff); in evergreen_dma_ring_ib_execute()
90 radeon_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in evergreen_dma_ring_ib_execute()
143 radeon_ring_write(ring, upper_32_bits(dst_offset) & 0xff); in evergreen_copy_dma()
144 radeon_ring_write(ring, upper_32_bits(src_offset) & 0xff); in evergreen_copy_dma()
|
| H A D | cik_sdma.c | 146 radeon_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr)); in cik_sdma_ring_ib_execute()
156 radeon_ring_write(ring, upper_32_bits(ib->gpu_addr)); in cik_sdma_ring_ib_execute()
209 radeon_ring_write(ring, upper_32_bits(addr)); in cik_sdma_fence_ring_emit()
238 radeon_ring_write(ring, upper_32_bits(addr)); in cik_sdma_semaphore_ring_emit()
401 upper_32_bits(rdev->wb.gpu_addr + wb_offset) & 0xFFFFFFFF); in cik_sdma_gfx_resume()
615 radeon_ring_write(ring, upper_32_bits(src_offset)); in cik_copy_dma()
617 radeon_ring_write(ring, upper_32_bits(dst_offset)); in cik_copy_dma()
671 radeon_ring_write(ring, upper_32_bits(gpu_addr)); in cik_sdma_ring_test()
729 ib.ptr[2] = upper_32_bits(gpu_addr); in cik_sdma_ib_test()
818 ib->ptr[ib->length_dw++] = upper_32_bits(sr in cik_sdma_vm_copy_pages()
[all...] |
| H A D | ni_dma.c | 135 radeon_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xff); in cayman_dma_ring_ib_execute()
146 radeon_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in cayman_dma_ring_ib_execute()
223 upper_32_bits(rdev->wb.gpu_addr + wb_offset) & 0xFF); in cayman_dma_resume()
331 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in cayman_dma_vm_copy_pages()
332 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff; in cayman_dma_vm_copy_pages()
371 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in cayman_dma_vm_write_pages()
383 ib->ptr[ib->length_dw++] = upper_32_bits(value); in cayman_dma_vm_write_pages()
423 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in cayman_dma_vm_set_pages()
427 ib->ptr[ib->length_dw++] = upper_32_bits(value); in cayman_dma_vm_set_pages()
|
| H A D | r600_dma.c | 144 upper_32_bits(rdev->wb.gpu_addr + R600_WB_DMA_RPTR_OFFSET) & 0xFF); in r600_dma_resume()
256 radeon_ring_write(ring, upper_32_bits(gpu_addr) & 0xff); in r600_dma_ring_test()
296 radeon_ring_write(ring, (upper_32_bits(addr) & 0xff)); in r600_dma_fence_ring_emit()
323 radeon_ring_write(ring, upper_32_bits(addr) & 0xff); in r600_dma_semaphore_ring_emit()
361 ib.ptr[2] = upper_32_bits(gpu_addr) & 0xff; in r600_dma_ib_test()
416 radeon_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xff); in r600_dma_ring_ib_execute()
427 radeon_ring_write(ring, (ib->length_dw << 16) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in r600_dma_ring_ib_execute()
479 radeon_ring_write(ring, (((upper_32_bits(dst_offset) & 0xff) << 16) | in r600_copy_dma()
480 (upper_32_bits(src_offset) & 0xff))); in r600_copy_dma()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
| H A D | si_dma.c | 82 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_copy_pages()
83 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff; in si_dma_vm_copy_pages()
121 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_write_pages()
133 ib->ptr[ib->length_dw++] = upper_32_bits(value); in si_dma_vm_write_pages()
173 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_set_pages()
177 ib->ptr[ib->length_dw++] = upper_32_bits(value); in si_dma_vm_set_pages()
265 radeon_ring_write(ring, upper_32_bits(dst_offset) & 0xff); in si_copy_dma()
266 radeon_ring_write(ring, upper_32_bits(src_offset) & 0xff); in si_copy_dma()
|
| H A D | evergreen_dma.c | 48 radeon_ring_write(ring, (upper_32_bits(addr) & 0xff)); in evergreen_dma_fence_ring_emit()
78 radeon_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xff); in evergreen_dma_ring_ib_execute()
89 radeon_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in evergreen_dma_ring_ib_execute()
142 radeon_ring_write(ring, upper_32_bits(dst_offset) & 0xff); in evergreen_copy_dma()
143 radeon_ring_write(ring, upper_32_bits(src_offset) & 0xff); in evergreen_copy_dma()
|
| H A D | cik_sdma.c | 145 radeon_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr)); in cik_sdma_ring_ib_execute()
155 radeon_ring_write(ring, upper_32_bits(ib->gpu_addr)); in cik_sdma_ring_ib_execute()
208 radeon_ring_write(ring, upper_32_bits(addr)); in cik_sdma_fence_ring_emit()
237 radeon_ring_write(ring, upper_32_bits(addr)); in cik_sdma_semaphore_ring_emit()
400 upper_32_bits(rdev->wb.gpu_addr + wb_offset) & 0xFFFFFFFF); in cik_sdma_gfx_resume()
614 radeon_ring_write(ring, upper_32_bits(src_offset)); in cik_copy_dma()
616 radeon_ring_write(ring, upper_32_bits(dst_offset)); in cik_copy_dma()
670 radeon_ring_write(ring, upper_32_bits(gpu_addr)); in cik_sdma_ring_test()
728 ib.ptr[2] = upper_32_bits(gpu_addr); in cik_sdma_ib_test()
817 ib->ptr[ib->length_dw++] = upper_32_bits(sr in cik_sdma_vm_copy_pages()
[all...] |
| H A D | r600_dma.c | 143 upper_32_bits(rdev->wb.gpu_addr + R600_WB_DMA_RPTR_OFFSET) & 0xFF); in r600_dma_resume()
255 radeon_ring_write(ring, upper_32_bits(gpu_addr) & 0xff); in r600_dma_ring_test()
295 radeon_ring_write(ring, (upper_32_bits(addr) & 0xff)); in r600_dma_fence_ring_emit()
322 radeon_ring_write(ring, upper_32_bits(addr) & 0xff); in r600_dma_semaphore_ring_emit()
360 ib.ptr[2] = upper_32_bits(gpu_addr) & 0xff; in r600_dma_ib_test()
415 radeon_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xff); in r600_dma_ring_ib_execute()
426 radeon_ring_write(ring, (ib->length_dw << 16) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in r600_dma_ring_ib_execute()
478 radeon_ring_write(ring, (((upper_32_bits(dst_offset) & 0xff) << 16) | in r600_copy_dma()
479 (upper_32_bits(src_offset) & 0xff))); in r600_copy_dma()
|
| H A D | ni_dma.c | 134 radeon_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xff); in cayman_dma_ring_ib_execute()
145 radeon_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in cayman_dma_ring_ib_execute()
222 upper_32_bits(rdev->wb.gpu_addr + wb_offset) & 0xFF); in cayman_dma_resume()
330 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in cayman_dma_vm_copy_pages()
331 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff; in cayman_dma_vm_copy_pages()
370 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in cayman_dma_vm_write_pages()
382 ib->ptr[ib->length_dw++] = upper_32_bits(value); in cayman_dma_vm_write_pages()
422 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in cayman_dma_vm_set_pages()
426 ib->ptr[ib->length_dw++] = upper_32_bits(value); in cayman_dma_vm_set_pages()
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| H A D | si_dma.c | 76 amdgpu_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in si_dma_ring_emit_ib()
98 amdgpu_ring_write(ring, (upper_32_bits(addr) & 0xff)); in si_dma_ring_emit_fence()
105 amdgpu_ring_write(ring, (upper_32_bits(addr) & 0xff)); in si_dma_ring_emit_fence()
106 amdgpu_ring_write(ring, upper_32_bits(seq)); in si_dma_ring_emit_fence()
158 WREG32(DMA_RB_RPTR_ADDR_HI + sdma_offsets[i], upper_32_bits(rptr_addr) & 0xFF); in si_dma_start()
224 amdgpu_ring_write(ring, upper_32_bits(gpu_addr) & 0xff); in si_dma_ring_test_ring()
276 ib.ptr[2] = upper_32_bits(gpu_addr) & 0xff; in si_dma_ring_test_ib()
324 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_copy_pte()
325 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff; in si_dma_vm_copy_pte()
347 ib->ptr[ib->length_dw++] = upper_32_bits(p in si_dma_vm_write_pte()
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| H A D | si_dma.c | 75 amdgpu_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in si_dma_ring_emit_ib()
99 amdgpu_ring_write(ring, (upper_32_bits(addr) & 0xff)); in si_dma_ring_emit_fence()
106 amdgpu_ring_write(ring, (upper_32_bits(addr) & 0xff)); in si_dma_ring_emit_fence()
107 amdgpu_ring_write(ring, upper_32_bits(seq)); in si_dma_ring_emit_fence()
156 WREG32(DMA_RB_RPTR_ADDR_HI + sdma_offsets[i], upper_32_bits(rptr_addr) & 0xFF); in si_dma_start()
220 amdgpu_ring_write(ring, upper_32_bits(gpu_addr) & 0xff); in si_dma_ring_test_ring()
273 ib.ptr[2] = upper_32_bits(gpu_addr) & 0xff; in si_dma_ring_test_ib()
321 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_copy_pte()
322 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff; in si_dma_vm_copy_pte()
344 ib->ptr[ib->length_dw++] = upper_32_bits(p in si_dma_vm_write_pte()
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/ |
| H A D | gm20b.c | 84 hdr.code_dma_base1 = upper_32_bits((addr + adjust) >> 8); in gm20b_pmu_acr_bld_patch()
87 hdr.data_dma_base1 = upper_32_bits((addr + adjust) >> 8); in gm20b_pmu_acr_bld_patch()
90 hdr.overlay_dma_base1 = upper_32_bits((addr + adjust) << 8); in gm20b_pmu_acr_bld_patch()
114 .code_dma_base1 = upper_32_bits(code), in gm20b_pmu_acr_bld_write()
115 .data_dma_base1 = upper_32_bits(data), in gm20b_pmu_acr_bld_write()
116 .overlay_dma_base1 = upper_32_bits(code), in gm20b_pmu_acr_bld_write()
|
| /kernel/linux/linux-5.10/drivers/pci/controller/mobiveil/ |
| H A D | pcie-mobiveil.c | 154 mobiveil_csr_writel(pcie, upper_32_bits(size64), in program_ib_windows()
159 mobiveil_csr_writel(pcie, upper_32_bits(cpu_addr), in program_ib_windows()
164 mobiveil_csr_writel(pcie, upper_32_bits(pci_addr), in program_ib_windows()
195 mobiveil_csr_writel(pcie, upper_32_bits(size64), in program_ob_windows()
205 mobiveil_csr_writel(pcie, upper_32_bits(cpu_addr), in program_ob_windows()
210 mobiveil_csr_writel(pcie, upper_32_bits(pci_addr), in program_ob_windows()
|
| /kernel/linux/linux-6.6/drivers/pci/controller/mobiveil/ |
| H A D | pcie-mobiveil.c | 154 mobiveil_csr_writel(pcie, upper_32_bits(size64), in program_ib_windows()
159 mobiveil_csr_writel(pcie, upper_32_bits(cpu_addr), in program_ib_windows()
164 mobiveil_csr_writel(pcie, upper_32_bits(pci_addr), in program_ib_windows()
195 mobiveil_csr_writel(pcie, upper_32_bits(size64), in program_ob_windows()
205 mobiveil_csr_writel(pcie, upper_32_bits(cpu_addr), in program_ob_windows()
210 mobiveil_csr_writel(pcie, upper_32_bits(pci_addr), in program_ob_windows()
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/apm/xgene-v2/ |
| H A D | ring.c | 28 dma_h = upper_32_bits(next_dma); in xge_setup_desc()
40 xge_wr_csr(pdata, DMATXDESCH, upper_32_bits(dma_addr)); in xge_update_tx_desc_addr()
52 xge_wr_csr(pdata, DMARXDESCH, upper_32_bits(dma_addr)); in xge_update_rx_desc_addr()
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/apm/xgene-v2/ |
| H A D | ring.c | 28 dma_h = upper_32_bits(next_dma); in xge_setup_desc()
40 xge_wr_csr(pdata, DMATXDESCH, upper_32_bits(dma_addr)); in xge_update_tx_desc_addr()
52 xge_wr_csr(pdata, DMARXDESCH, upper_32_bits(dma_addr)); in xge_update_rx_desc_addr()
|
| /kernel/linux/linux-6.6/drivers/iio/test/ |
| H A D | iio-test-format.c | 212 values[1] = upper_32_bits(value); in iio_test_iio_format_value_integer_64()
218 values[1] = upper_32_bits(value); in iio_test_iio_format_value_integer_64()
224 values[1] = upper_32_bits(value); in iio_test_iio_format_value_integer_64()
230 values[1] = upper_32_bits(value); in iio_test_iio_format_value_integer_64()
236 values[1] = upper_32_bits(value); in iio_test_iio_format_value_integer_64()
242 values[1] = upper_32_bits(value); in iio_test_iio_format_value_integer_64()
248 values[1] = upper_32_bits(value); in iio_test_iio_format_value_integer_64()
|