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Searched refs:tiling_info (Results 1 - 25 of 59) sorted by relevance

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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_debug.c130 "plane_state->tiling_info.gfx8.num_banks = %d;\n" in pre_surface_trace()
131 "plane_state->tiling_info.gfx8.bank_width = %d;\n" in pre_surface_trace()
132 "plane_state->tiling_info.gfx8.bank_width_c = %d;\n" in pre_surface_trace()
133 "plane_state->tiling_info.gfx8.bank_height = %d;\n" in pre_surface_trace()
134 "plane_state->tiling_info.gfx8.bank_height_c = %d;\n" in pre_surface_trace()
135 "plane_state->tiling_info.gfx8.tile_aspect = %d;\n" in pre_surface_trace()
136 "plane_state->tiling_info.gfx8.tile_aspect_c = %d;\n" in pre_surface_trace()
137 "plane_state->tiling_info.gfx8.tile_split = %d;\n" in pre_surface_trace()
138 "plane_state->tiling_info.gfx8.tile_split_c = %d;\n" in pre_surface_trace()
139 "plane_state->tiling_info in pre_surface_trace()
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_debug.c130 "plane_state->tiling_info.gfx8.num_banks = %d;\n" in pre_surface_trace()
131 "plane_state->tiling_info.gfx8.bank_width = %d;\n" in pre_surface_trace()
132 "plane_state->tiling_info.gfx8.bank_width_c = %d;\n" in pre_surface_trace()
133 "plane_state->tiling_info.gfx8.bank_height = %d;\n" in pre_surface_trace()
134 "plane_state->tiling_info.gfx8.bank_height_c = %d;\n" in pre_surface_trace()
135 "plane_state->tiling_info.gfx8.tile_aspect = %d;\n" in pre_surface_trace()
136 "plane_state->tiling_info.gfx8.tile_aspect_c = %d;\n" in pre_surface_trace()
137 "plane_state->tiling_info.gfx8.tile_split = %d;\n" in pre_surface_trace()
138 "plane_state->tiling_info.gfx8.tile_split_c = %d;\n" in pre_surface_trace()
139 "plane_state->tiling_info in pre_surface_trace()
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_plane.c180 static void fill_gfx8_tiling_info_from_flags(union dc_tiling_info *tiling_info, in fill_gfx8_tiling_info_from_flags() argument
194 tiling_info->gfx8.num_banks = num_banks; in fill_gfx8_tiling_info_from_flags()
195 tiling_info->gfx8.array_mode = in fill_gfx8_tiling_info_from_flags()
197 tiling_info->gfx8.tile_split = tile_split; in fill_gfx8_tiling_info_from_flags()
198 tiling_info->gfx8.bank_width = bankw; in fill_gfx8_tiling_info_from_flags()
199 tiling_info->gfx8.bank_height = bankh; in fill_gfx8_tiling_info_from_flags()
200 tiling_info->gfx8.tile_aspect = mtaspect; in fill_gfx8_tiling_info_from_flags()
201 tiling_info->gfx8.tile_mode = in fill_gfx8_tiling_info_from_flags()
205 tiling_info->gfx8.array_mode = DC_ARRAY_1D_TILED_THIN1; in fill_gfx8_tiling_info_from_flags()
208 tiling_info in fill_gfx8_tiling_info_from_flags()
212 fill_gfx9_tiling_info_from_device(const struct amdgpu_device *adev, union dc_tiling_info *tiling_info) fill_gfx9_tiling_info_from_device() argument
233 fill_gfx9_tiling_info_from_modifier(const struct amdgpu_device *adev, union dc_tiling_info *tiling_info, uint64_t modifier) fill_gfx9_tiling_info_from_modifier() argument
261 validate_dcc(struct amdgpu_device *adev, const enum surface_pixel_format format, const enum dc_rotation_angle rotation, const union dc_tiling_info *tiling_info, const struct dc_plane_dcc_param *dcc, const struct dc_plane_address *address, const struct plane_size *plane_size) validate_dcc() argument
306 fill_gfx9_plane_attributes_from_modifiers(struct amdgpu_device *adev, const struct amdgpu_framebuffer *afb, const enum surface_pixel_format format, const enum dc_rotation_angle rotation, const struct plane_size *plane_size, union dc_tiling_info *tiling_info, struct dc_plane_dcc_param *dcc, struct dc_plane_address *address, const bool force_disable_dcc) fill_gfx9_plane_attributes_from_modifiers() argument
753 amdgpu_dm_plane_fill_plane_buffer_attributes(struct amdgpu_device *adev, const struct amdgpu_framebuffer *afb, const enum surface_pixel_format format, const enum dc_rotation_angle rotation, const uint64_t tiling_flags, union dc_tiling_info *tiling_info, struct plane_size *plane_size, struct dc_plane_dcc_param *dcc, struct dc_plane_address *address, bool tmz_surface, bool force_disable_dcc) amdgpu_dm_plane_fill_plane_buffer_attributes() argument
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H A Damdgpu_dm_plane.h47 union dc_tiling_info *tiling_info,
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dhubp.h119 union dc_tiling_info *tiling_info,
133 union dc_tiling_info *tiling_info,
H A Dmem_input.h140 union dc_tiling_info *tiling_info,
154 union dc_tiling_info *tiling_info,
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn201/
H A Ddcn201_hubp.c45 union dc_tiling_info *tiling_info, in hubp201_program_surface_config()
53 hubp1_program_tiling(hubp, tiling_info, format); in hubp201_program_surface_config()
42 hubp201_program_surface_config( struct hubp *hubp, enum surface_pixel_format format, union dc_tiling_info *tiling_info, struct plane_size *plane_size, enum dc_rotation_angle rotation, struct dc_plane_dcc_param *dcc, bool horizontal_mirror, unsigned int compat_level) hubp201_program_surface_config() argument
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dmem_input.h144 union dc_tiling_info *tiling_info,
158 union dc_tiling_info *tiling_info,
H A Dhubp.h124 union dc_tiling_info *tiling_info,
138 union dc_tiling_info *tiling_info,
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_mem_input.c101 union dc_tiling_info *tiling_info) in get_mi_tiling()
103 switch (tiling_info->gfx8.array_mode) { in get_mi_tiling()
136 union dc_tiling_info *tiling_info, in dce_mi_program_pte_vm()
141 enum mi_tiling_format mi_tiling = get_mi_tiling(tiling_info); in dce_mi_program_pte_vm()
631 union dc_tiling_info *tiling_info, in dce_mi_program_surface_config()
640 program_tiling(dce_mi, tiling_info); in dce_mi_program_surface_config()
652 union dc_tiling_info *tiling_info, in dce60_mi_program_surface_config()
661 program_tiling(dce_mi, tiling_info); in dce60_mi_program_surface_config()
100 get_mi_tiling( union dc_tiling_info *tiling_info) get_mi_tiling() argument
133 dce_mi_program_pte_vm( struct mem_input *mi, enum surface_pixel_format format, union dc_tiling_info *tiling_info, enum dc_rotation_angle rotation) dce_mi_program_pte_vm() argument
628 dce_mi_program_surface_config( struct mem_input *mi, enum surface_pixel_format format, union dc_tiling_info *tiling_info, struct plane_size *plane_size, enum dc_rotation_angle rotation, struct dc_plane_dcc_param *dcc, bool horizontal_mirror) dce_mi_program_surface_config() argument
649 dce60_mi_program_surface_config( struct mem_input *mi, enum surface_pixel_format format, union dc_tiling_info *tiling_info, struct plane_size *plane_size, enum dc_rotation_angle rotation, struct dc_plane_dcc_param *dcc, bool horizontal_mirror) dce60_mi_program_surface_config() argument
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_mem_input.c101 union dc_tiling_info *tiling_info) in get_mi_tiling()
103 switch (tiling_info->gfx8.array_mode) { in get_mi_tiling()
136 union dc_tiling_info *tiling_info, in dce_mi_program_pte_vm()
141 enum mi_tiling_format mi_tiling = get_mi_tiling(tiling_info); in dce_mi_program_pte_vm()
633 union dc_tiling_info *tiling_info, in dce_mi_program_surface_config()
642 program_tiling(dce_mi, tiling_info); in dce_mi_program_surface_config()
654 union dc_tiling_info *tiling_info, in dce60_mi_program_surface_config()
663 program_tiling(dce_mi, tiling_info); in dce60_mi_program_surface_config()
100 get_mi_tiling( union dc_tiling_info *tiling_info) get_mi_tiling() argument
133 dce_mi_program_pte_vm( struct mem_input *mi, enum surface_pixel_format format, union dc_tiling_info *tiling_info, enum dc_rotation_angle rotation) dce_mi_program_pte_vm() argument
630 dce_mi_program_surface_config( struct mem_input *mi, enum surface_pixel_format format, union dc_tiling_info *tiling_info, struct plane_size *plane_size, enum dc_rotation_angle rotation, struct dc_plane_dcc_param *dcc, bool horizontal_mirror) dce_mi_program_surface_config() argument
651 dce60_mi_program_surface_config( struct mem_input *mi, enum surface_pixel_format format, union dc_tiling_info *tiling_info, struct plane_size *plane_size, enum dc_rotation_angle rotation, struct dc_plane_dcc_param *dcc, bool horizontal_mirror) dce60_mi_program_surface_config() argument
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_mem_input_v.c526 union dc_tiling_info *tiling_info, in get_dvmm_hw_setting()
544 switch (tiling_info->gfx8.array_mode) { in get_dvmm_hw_setting()
566 union dc_tiling_info *tiling_info, in dce_mem_input_v_program_pte_vm()
570 const unsigned int *pte = get_dvmm_hw_setting(tiling_info, format, false); in dce_mem_input_v_program_pte_vm()
571 const unsigned int *pte_chroma = get_dvmm_hw_setting(tiling_info, format, true); in dce_mem_input_v_program_pte_vm()
639 union dc_tiling_info *tiling_info, in dce_mem_input_v_program_surface_config()
648 program_tiling(mem_input110, tiling_info, format); in dce_mem_input_v_program_surface_config()
525 get_dvmm_hw_setting( union dc_tiling_info *tiling_info, enum surface_pixel_format format, bool chroma) get_dvmm_hw_setting() argument
563 dce_mem_input_v_program_pte_vm( struct mem_input *mem_input, enum surface_pixel_format format, union dc_tiling_info *tiling_info, enum dc_rotation_angle rotation) dce_mem_input_v_program_pte_vm() argument
636 dce_mem_input_v_program_surface_config( struct mem_input *mem_input, enum surface_pixel_format format, union dc_tiling_info *tiling_info, struct plane_size *plane_size, enum dc_rotation_angle rotation, struct dc_plane_dcc_param *dcc, bool horizotal_mirror) dce_mem_input_v_program_surface_config() argument
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_mem_input_v.c528 union dc_tiling_info *tiling_info, in get_dvmm_hw_setting()
546 switch (tiling_info->gfx8.array_mode) { in get_dvmm_hw_setting()
568 union dc_tiling_info *tiling_info, in dce_mem_input_v_program_pte_vm()
572 const unsigned int *pte = get_dvmm_hw_setting(tiling_info, format, false); in dce_mem_input_v_program_pte_vm()
573 const unsigned int *pte_chroma = get_dvmm_hw_setting(tiling_info, format, true); in dce_mem_input_v_program_pte_vm()
641 union dc_tiling_info *tiling_info, in dce_mem_input_v_program_surface_config()
650 program_tiling(mem_input110, tiling_info, format); in dce_mem_input_v_program_surface_config()
527 get_dvmm_hw_setting( union dc_tiling_info *tiling_info, enum surface_pixel_format format, bool chroma) get_dvmm_hw_setting() argument
565 dce_mem_input_v_program_pte_vm( struct mem_input *mem_input, enum surface_pixel_format format, union dc_tiling_info *tiling_info, enum dc_rotation_angle rotation) dce_mem_input_v_program_pte_vm() argument
638 dce_mem_input_v_program_surface_config( struct mem_input *mem_input, enum surface_pixel_format format, union dc_tiling_info *tiling_info, struct plane_size *plane_size, enum dc_rotation_angle rotation, struct dc_plane_dcc_param *dcc, bool horizotal_mirror) dce_mem_input_v_program_surface_config() argument
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce60/
H A Ddce60_hw_sequencer.c105 if (pipe_ctx->plane_state->tiling_info.gfx8.array_mode == DC_ARRAY_LINEAR_GENERAL) in dce60_should_enable_fbc()
319 &plane_state->tiling_info, in dce60_program_front_end_for_pipe()
331 &plane_state->tiling_info, in dce60_program_front_end_for_pipe()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce60/
H A Ddce60_hw_sequencer.c105 if (pipe_ctx->plane_state->tiling_info.gfx8.array_mode == DC_ARRAY_LINEAR_GENERAL) in dce60_should_enable_fbc()
319 &plane_state->tiling_info, in dce60_program_front_end_for_pipe()
331 &plane_state->tiling_info, in dce60_program_front_end_for_pipe()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm.c3853 const union dc_tiling_info *tiling_info,
3884 input.swizzle_mode = tiling_info->gfx9.swizzle;
3918 union dc_tiling_info *tiling_info,
3928 memset(tiling_info, 0, sizeof(*tiling_info));
3987 tiling_info->gfx8.num_banks = num_banks;
3988 tiling_info->gfx8.array_mode =
3990 tiling_info->gfx8.tile_split = tile_split;
3991 tiling_info->gfx8.bank_width = bankw;
3992 tiling_info
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_hubp.c408 union dc_tiling_info *tiling_info, in hubp3_program_surface_config()
418 hubp3_program_tiling(hubp2, tiling_info, format); in hubp3_program_surface_config()
405 hubp3_program_surface_config( struct hubp *hubp, enum surface_pixel_format format, union dc_tiling_info *tiling_info, struct plane_size *plane_size, enum dc_rotation_angle rotation, struct dc_plane_dcc_param *dcc, bool horizontal_mirror, unsigned int compat_level) hubp3_program_surface_config() argument
H A Ddcn30_hubp.h262 union dc_tiling_info *tiling_info,
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_hubp.c398 union dc_tiling_info *tiling_info, in hubp3_program_surface_config()
408 hubp3_program_tiling(hubp2, tiling_info, format); in hubp3_program_surface_config()
395 hubp3_program_surface_config( struct hubp *hubp, enum surface_pixel_format format, union dc_tiling_info *tiling_info, struct plane_size *plane_size, enum dc_rotation_angle rotation, struct dc_plane_dcc_param *dcc, bool horizontal_mirror, unsigned int compat_level) hubp3_program_surface_config() argument
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_gem.c491 amdgpu_bo_get_tiling_flags(robj, &args->data.tiling_info); in amdgpu_gem_metadata_ioctl()
501 r = amdgpu_bo_set_tiling_flags(robj, args->data.tiling_info); in amdgpu_gem_metadata_ioctl()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/
H A Ddc.h835 union dc_tiling_info tiling_info; member
887 union dc_tiling_info tiling_info; member
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_gem.c571 amdgpu_bo_get_tiling_flags(robj, &args->data.tiling_info); in amdgpu_gem_metadata_ioctl()
581 r = amdgpu_bo_set_tiling_flags(robj, args->data.tiling_info); in amdgpu_gem_metadata_ioctl()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_hubp.h335 union dc_tiling_info *tiling_info,
/kernel/linux/linux-5.10/include/uapi/drm/
H A Damdgpu_drm.h378 __u64 tiling_info; member
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_hubp.h342 union dc_tiling_info *tiling_info,

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