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Searched refs:reset_lock (Results 1 - 25 of 43) sorted by relevance

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/kernel/linux/linux-5.10/drivers/clk/mmp/
H A Dclk-of-pxa1928.c96 static DEFINE_SPINLOCK(reset_lock);
108 {PXA1928_CLK_TWSI0, "twsi0_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_TWSI0 * 4, 0x3, 0x3, 0x0, 0, &reset_lock},
109 {PXA1928_CLK_TWSI1, "twsi1_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_TWSI1 * 4, 0x3, 0x3, 0x0, 0, &reset_lock},
110 {PXA1928_CLK_TWSI2, "twsi2_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_TWSI2 * 4, 0x3, 0x3, 0x0, 0, &reset_lock},
111 {PXA1928_CLK_TWSI3, "twsi3_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_TWSI3 * 4, 0x3, 0x3, 0x0, 0, &reset_lock},
112 {PXA1928_CLK_TWSI4, "twsi4_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_TWSI4 * 4, 0x3, 0x3, 0x0, 0, &reset_lock},
113 {PXA1928_CLK_TWSI5, "twsi5_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_TWSI5 * 4, 0x3, 0x3, 0x0, 0, &reset_lock},
114 {PXA1928_CLK_GPIO, "gpio_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_GPIO * 4, 0x3, 0x3, 0x0, 0, &reset_lock},
117 {PXA1928_CLK_PWM0, "pwm0_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_PWM0 * 4, 0x3, 0x3, 0x0, 0, &reset_lock},
118 {PXA1928_CLK_PWM1, "pwm1_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_PWM1 * 4, 0x3, 0x3, 0x0, 0, &reset_lock},
[all...]
H A Dclk-of-mmp2.c237 static DEFINE_SPINLOCK(reset_lock);
252 {MMP2_CLK_TWSI0, "twsi0_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_TWSI0, 0x7, 0x3, 0x0, 0, &reset_lock},
253 {MMP2_CLK_TWSI1, "twsi1_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_TWSI1, 0x7, 0x3, 0x0, 0, &reset_lock},
254 {MMP2_CLK_TWSI2, "twsi2_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_TWSI2, 0x7, 0x3, 0x0, 0, &reset_lock},
255 {MMP2_CLK_TWSI3, "twsi3_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_TWSI3, 0x7, 0x3, 0x0, 0, &reset_lock},
256 {MMP2_CLK_TWSI4, "twsi4_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_TWSI4, 0x7, 0x3, 0x0, 0, &reset_lock},
257 {MMP2_CLK_TWSI5, "twsi5_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_TWSI5, 0x7, 0x3, 0x0, 0, &reset_lock},
258 {MMP2_CLK_GPIO, "gpio_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_GPIO, 0x7, 0x3, 0x0, 0, &reset_lock},
259 {MMP2_CLK_KPC, "kpc_clk", "clk32", CLK_SET_RATE_PARENT, APBC_KPC, 0x7, 0x3, 0x0, MMP_CLK_GATE_NEED_DELAY, &reset_lock},
260 {MMP2_CLK_RTC, "rtc_clk", "clk32", CLK_SET_RATE_PARENT, APBC_RTC, 0x87, 0x83, 0x0, MMP_CLK_GATE_NEED_DELAY, &reset_lock},
[all...]
H A Dclk-of-pxa168.c128 static DEFINE_SPINLOCK(reset_lock);
143 {PXA168_CLK_TWSI0, "twsi0_clk", "pll1_13_1_5", CLK_SET_RATE_PARENT, APBC_TWSI0, 0x3, 0x3, 0x0, 0, &reset_lock},
144 {PXA168_CLK_TWSI1, "twsi1_clk", "pll1_13_1_5", CLK_SET_RATE_PARENT, APBC_TWSI1, 0x3, 0x3, 0x0, 0, &reset_lock},
145 {PXA168_CLK_GPIO, "gpio_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_GPIO, 0x3, 0x3, 0x0, 0, &reset_lock},
148 {PXA168_CLK_PWM0, "pwm0_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM0, 0x3, 0x3, 0x0, 0, &reset_lock},
149 {PXA168_CLK_PWM1, "pwm1_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM1, 0x3, 0x3, 0x0, 0, &reset_lock},
150 {PXA168_CLK_PWM2, "pwm2_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM2, 0x3, 0x3, 0x0, 0, &reset_lock},
151 {PXA168_CLK_PWM3, "pwm3_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM3, 0x3, 0x3, 0x0, 0, &reset_lock},
H A Dclk-of-pxa910.c126 static DEFINE_SPINLOCK(reset_lock);
142 {PXA910_CLK_TWSI0, "twsi0_clk", "pll1_13_1_5", CLK_SET_RATE_PARENT, APBC_TWSI0, 0x3, 0x3, 0x0, 0, &reset_lock},
143 {PXA910_CLK_GPIO, "gpio_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_GPIO, 0x3, 0x3, 0x0, 0, &reset_lock},
146 {PXA910_CLK_PWM0, "pwm0_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM0, 0x3, 0x3, 0x0, 0, &reset_lock},
147 {PXA910_CLK_PWM1, "pwm1_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM1, 0x3, 0x3, 0x0, 0, &reset_lock},
148 {PXA910_CLK_PWM2, "pwm2_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM2, 0x3, 0x3, 0x0, 0, &reset_lock},
149 {PXA910_CLK_PWM3, "pwm3_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM3, 0x3, 0x3, 0x0, 0, &reset_lock},
160 {PXA910_CLK_TWSI1, "twsi1_clk", "pll1_13_1_5", CLK_SET_RATE_PARENT, APBCP_TWSI1, 0x3, 0x3, 0x0, 0, &reset_lock},
/kernel/linux/linux-6.6/drivers/clk/mmp/
H A Dclk-of-pxa1928.c96 static DEFINE_SPINLOCK(reset_lock);
108 {PXA1928_CLK_TWSI0, "twsi0_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_TWSI0 * 4, 0x3, 0x3, 0x0, 0, &reset_lock},
109 {PXA1928_CLK_TWSI1, "twsi1_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_TWSI1 * 4, 0x3, 0x3, 0x0, 0, &reset_lock},
110 {PXA1928_CLK_TWSI2, "twsi2_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_TWSI2 * 4, 0x3, 0x3, 0x0, 0, &reset_lock},
111 {PXA1928_CLK_TWSI3, "twsi3_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_TWSI3 * 4, 0x3, 0x3, 0x0, 0, &reset_lock},
112 {PXA1928_CLK_TWSI4, "twsi4_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_TWSI4 * 4, 0x3, 0x3, 0x0, 0, &reset_lock},
113 {PXA1928_CLK_TWSI5, "twsi5_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_TWSI5 * 4, 0x3, 0x3, 0x0, 0, &reset_lock},
114 {PXA1928_CLK_GPIO, "gpio_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_GPIO * 4, 0x3, 0x3, 0x0, 0, &reset_lock},
117 {PXA1928_CLK_PWM0, "pwm0_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_PWM0 * 4, 0x3, 0x3, 0x0, 0, &reset_lock},
118 {PXA1928_CLK_PWM1, "pwm1_clk", "vctcxo", CLK_SET_RATE_PARENT, PXA1928_CLK_PWM1 * 4, 0x3, 0x3, 0x0, 0, &reset_lock},
[all...]
H A Dclk-of-mmp2.c236 static DEFINE_SPINLOCK(reset_lock);
251 {MMP2_CLK_TWSI0, "twsi0_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_TWSI0, 0x7, 0x3, 0x0, 0, &reset_lock},
252 {MMP2_CLK_TWSI1, "twsi1_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_TWSI1, 0x7, 0x3, 0x0, 0, &reset_lock},
253 {MMP2_CLK_TWSI2, "twsi2_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_TWSI2, 0x7, 0x3, 0x0, 0, &reset_lock},
254 {MMP2_CLK_TWSI3, "twsi3_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_TWSI3, 0x7, 0x3, 0x0, 0, &reset_lock},
255 {MMP2_CLK_TWSI4, "twsi4_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_TWSI4, 0x7, 0x3, 0x0, 0, &reset_lock},
256 {MMP2_CLK_TWSI5, "twsi5_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_TWSI5, 0x7, 0x3, 0x0, 0, &reset_lock},
257 {MMP2_CLK_GPIO, "gpio_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_GPIO, 0x7, 0x3, 0x0, 0, &reset_lock},
258 {MMP2_CLK_KPC, "kpc_clk", "clk32", CLK_SET_RATE_PARENT, APBC_KPC, 0x7, 0x3, 0x0, MMP_CLK_GATE_NEED_DELAY, &reset_lock},
259 {MMP2_CLK_RTC, "rtc_clk", "clk32", CLK_SET_RATE_PARENT, APBC_RTC, 0x87, 0x83, 0x0, MMP_CLK_GATE_NEED_DELAY, &reset_lock},
[all...]
H A Dclk-of-pxa910.c125 static DEFINE_SPINLOCK(reset_lock);
141 {PXA910_CLK_TWSI0, "twsi0_clk", "pll1_13_1_5", CLK_SET_RATE_PARENT, APBC_TWSI0, 0x3, 0x3, 0x0, 0, &reset_lock},
142 {PXA910_CLK_GPIO, "gpio_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_GPIO, 0x3, 0x3, 0x0, 0, &reset_lock},
145 {PXA910_CLK_PWM0, "pwm0_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM0, 0x3, 0x3, 0x0, 0, &reset_lock},
146 {PXA910_CLK_PWM1, "pwm1_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM1, 0x3, 0x3, 0x0, 0, &reset_lock},
147 {PXA910_CLK_PWM2, "pwm2_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM2, 0x3, 0x3, 0x0, 0, &reset_lock},
148 {PXA910_CLK_PWM3, "pwm3_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM3, 0x3, 0x3, 0x0, 0, &reset_lock},
159 {PXA910_CLK_TWSI1, "twsi1_clk", "pll1_13_1_5", CLK_SET_RATE_PARENT, APBCP_TWSI1, 0x3, 0x3, 0x0, 0, &reset_lock},
/kernel/linux/linux-5.10/drivers/pci/hotplug/
H A Dpciehp_pci.c68 * Release reset_lock during driver binding in pciehp_configure_device()
71 up_read(&ctrl->reset_lock); in pciehp_configure_device()
73 down_read_nested(&ctrl->reset_lock, ctrl->depth); in pciehp_configure_device()
116 * Release reset_lock during driver unbinding in pciehp_unconfigure_device()
119 up_read(&ctrl->reset_lock); in pciehp_unconfigure_device()
121 down_read_nested(&ctrl->reset_lock, ctrl->depth); in pciehp_unconfigure_device()
H A Dpciehp_hpc.c582 down_read_nested(&ctrl->reset_lock, ctrl->depth); in pciehp_ignore_dpc_link_change()
585 up_read(&ctrl->reset_lock); in pciehp_ignore_dpc_link_change()
746 down_read_nested(&ctrl->reset_lock, ctrl->depth); in pciehp_ist()
751 up_read(&ctrl->reset_lock); in pciehp_ist()
880 down_write_nested(&ctrl->reset_lock, ctrl->depth); in pciehp_reset_slot()
900 up_write(&ctrl->reset_lock); in pciehp_reset_slot()
979 init_rwsem(&ctrl->reset_lock); in pcie_init()
H A Dpciehp_core.c169 down_read_nested(&ctrl->reset_lock, ctrl->depth); in pciehp_check_presence()
180 up_read(&ctrl->reset_lock); in pciehp_check_presence()
H A Dpciehp.h72 * @reset_lock: prevents access to the Data Link Layer Link Active bit in the
76 * used as lock subclass for @reset_lock
107 struct rw_semaphore reset_lock; member
/kernel/linux/linux-6.6/drivers/pci/hotplug/
H A Dpciehp_pci.c68 * Release reset_lock during driver binding in pciehp_configure_device()
71 up_read(&ctrl->reset_lock); in pciehp_configure_device()
73 down_read_nested(&ctrl->reset_lock, ctrl->depth); in pciehp_configure_device()
116 * Release reset_lock during driver unbinding in pciehp_unconfigure_device()
119 up_read(&ctrl->reset_lock); in pciehp_unconfigure_device()
121 down_read_nested(&ctrl->reset_lock, ctrl->depth); in pciehp_unconfigure_device()
H A Dpciehp_hpc.c582 down_read_nested(&ctrl->reset_lock, ctrl->depth); in pciehp_ignore_dpc_link_change()
585 up_read(&ctrl->reset_lock); in pciehp_ignore_dpc_link_change()
743 down_read_nested(&ctrl->reset_lock, ctrl->depth); in pciehp_ist()
748 up_read(&ctrl->reset_lock); in pciehp_ist()
905 down_write_nested(&ctrl->reset_lock, ctrl->depth); in pciehp_reset_slot()
925 up_write(&ctrl->reset_lock); in pciehp_reset_slot()
1004 init_rwsem(&ctrl->reset_lock); in pcie_init()
H A Dpciehp_core.c169 down_read_nested(&ctrl->reset_lock, ctrl->depth); in pciehp_check_presence()
180 up_read(&ctrl->reset_lock); in pciehp_check_presence()
/kernel/linux/linux-5.10/drivers/net/ethernet/xilinx/
H A Dxilinx_emaclite.c118 * @reset_lock: lock used for synchronization
136 spinlock_t reset_lock; member
535 spin_lock_irqsave(&lp->reset_lock, flags); in xemaclite_tx_timeout()
554 spin_unlock_irqrestore(&lp->reset_lock, flags); in xemaclite_tx_timeout()
1023 spin_lock_irqsave(&lp->reset_lock, flags); in xemaclite_send()
1033 spin_unlock_irqrestore(&lp->reset_lock, flags); in xemaclite_send()
1036 spin_unlock_irqrestore(&lp->reset_lock, flags); in xemaclite_send()
1147 spin_lock_init(&lp->reset_lock); in xemaclite_of_probe()
/kernel/linux/linux-6.6/drivers/net/ethernet/xilinx/
H A Dxilinx_emaclite.c111 * @reset_lock: lock to serialize xmit and tx_timeout execution
128 spinlock_t reset_lock; /* serialize xmit and tx_timeout execution */ member
530 spin_lock_irqsave(&lp->reset_lock, flags); in xemaclite_tx_timeout()
549 spin_unlock_irqrestore(&lp->reset_lock, flags); in xemaclite_tx_timeout()
1007 spin_lock_irqsave(&lp->reset_lock, flags); in xemaclite_send()
1017 spin_unlock_irqrestore(&lp->reset_lock, flags); in xemaclite_send()
1020 spin_unlock_irqrestore(&lp->reset_lock, flags); in xemaclite_send()
1127 spin_lock_init(&lp->reset_lock); in xemaclite_of_probe()
/kernel/linux/linux-5.10/drivers/net/ethernet/qualcomm/emac/
H A Demac.c85 mutex_lock(&adpt->reset_lock); in emac_reinit_locked()
91 mutex_unlock(&adpt->reset_lock); in emac_reinit_locked()
272 mutex_lock(&adpt->reset_lock); in emac_close()
280 mutex_unlock(&adpt->reset_lock); in emac_close()
630 mutex_init(&adpt->reset_lock); in emac_probe()
/kernel/linux/linux-6.6/drivers/net/ethernet/qualcomm/emac/
H A Demac.c84 mutex_lock(&adpt->reset_lock); in emac_reinit_locked()
90 mutex_unlock(&adpt->reset_lock); in emac_reinit_locked()
271 mutex_lock(&adpt->reset_lock); in emac_close()
279 mutex_unlock(&adpt->reset_lock); in emac_close()
626 mutex_init(&adpt->reset_lock); in emac_probe()
/kernel/linux/linux-6.6/drivers/vfio/pci/hisilicon/
H A Dhisi_acc_vfio_pci.h113 spinlock_t reset_lock; member
H A Dhisi_acc_vfio_pci.c641 spin_lock(&hisi_acc_vdev->reset_lock); in hisi_acc_vf_state_mutex_unlock()
644 spin_unlock(&hisi_acc_vdev->reset_lock); in hisi_acc_vf_state_mutex_unlock()
651 spin_unlock(&hisi_acc_vdev->reset_lock); in hisi_acc_vf_state_mutex_unlock()
1114 spin_lock(&hisi_acc_vdev->reset_lock); in hisi_acc_vf_pci_aer_reset_done()
1117 spin_unlock(&hisi_acc_vdev->reset_lock); in hisi_acc_vf_pci_aer_reset_done()
1120 spin_unlock(&hisi_acc_vdev->reset_lock); in hisi_acc_vf_pci_aer_reset_done()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_reset.h65 struct mutex reset_lock; member
/kernel/linux/linux-5.10/drivers/hid/i2c-hid/
H A Di2c-hid-core.c162 struct mutex reset_lock; member
453 mutex_lock(&ihid->reset_lock); in i2c_hid_hwreset()
473 mutex_unlock(&ihid->reset_lock); in i2c_hid_hwreset()
664 mutex_lock(&ihid->reset_lock); in i2c_hid_output_raw_report()
680 mutex_unlock(&ihid->reset_lock); in i2c_hid_output_raw_report()
1101 mutex_init(&ihid->reset_lock); in i2c_hid_probe()
/kernel/linux/linux-6.6/drivers/vfio/pci/mlx5/
H A Dmain.c1147 spin_lock(&mvdev->reset_lock); in mlx5vf_state_mutex_unlock()
1150 spin_unlock(&mvdev->reset_lock); in mlx5vf_state_mutex_unlock()
1156 spin_unlock(&mvdev->reset_lock); in mlx5vf_state_mutex_unlock()
1234 spin_lock(&mvdev->reset_lock); in mlx5vf_pci_aer_reset_done()
1237 spin_unlock(&mvdev->reset_lock); in mlx5vf_pci_aer_reset_done()
1240 spin_unlock(&mvdev->reset_lock); in mlx5vf_pci_aer_reset_done()
/kernel/linux/linux-6.6/drivers/hid/i2c-hid/
H A Di2c-hid-core.c109 struct mutex reset_lock; member
481 mutex_lock(&ihid->reset_lock); in i2c_hid_hwreset()
500 mutex_unlock(&ihid->reset_lock); in i2c_hid_hwreset()
684 mutex_lock(&ihid->reset_lock); in i2c_hid_output_raw_report()
700 mutex_unlock(&ihid->reset_lock); in i2c_hid_output_raw_report()
1208 mutex_init(&ihid->reset_lock); in i2c_hid_core_probe()
/kernel/linux/linux-5.10/drivers/block/rsxx/
H A Dcregs.c304 * mutex_trylock is used here because if reset_lock is taken then a in creg_reset()
307 if (!mutex_trylock(&card->creg_ctrl.reset_lock)) in creg_reset()
347 mutex_unlock(&card->creg_ctrl.reset_lock); in creg_reset()
731 mutex_init(&card->creg_ctrl.reset_lock); in rsxx_creg_setup()

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