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Searched refs:nitrox_write_csr (Results 1 - 10 of 10) sorted by relevance

/kernel/linux/linux-5.10/drivers/crypto/cavium/nitrox/
H A Dnitrox_hal.c30 nitrox_write_csr(ndev, EMU_AE_ENABLEX(i), emu_ae.value); in emu_enable_cores()
31 nitrox_write_csr(ndev, EMU_SE_ENABLEX(i), emu_se.value); in emu_enable_cores()
58 nitrox_write_csr(ndev, offset, emu_wd_int.value); in nitrox_config_emu_unit()
60 nitrox_write_csr(ndev, offset, emu_ge_int.value); in nitrox_config_emu_unit()
75 nitrox_write_csr(ndev, offset, pkt_in_ctl.value); in reset_pkt_input_ring()
89 nitrox_write_csr(ndev, offset, pkt_in_cnts.value); in reset_pkt_input_ring()
104 nitrox_write_csr(ndev, offset, pkt_in_ctl.value); in enable_pkt_input_ring()
137 nitrox_write_csr(ndev, offset, cmdq->dma); in nitrox_config_pkt_input_rings()
143 nitrox_write_csr(ndev, offset, pkt_in_rsize.value); in nitrox_config_pkt_input_rings()
147 nitrox_write_csr(nde in nitrox_config_pkt_input_rings()
[all...]
H A Dnitrox_isr.c47 nitrox_write_csr(ndev, NPS_CORE_INT, value); in clear_nps_core_err_intr()
65 nitrox_write_csr(ndev, offset, value); in clear_nps_pkt_err_intr()
71 nitrox_write_csr(ndev, offset, value); in clear_nps_pkt_err_intr()
81 nitrox_write_csr(ndev, offset, value); in clear_nps_pkt_err_intr()
89 nitrox_write_csr(ndev, offset, value); in clear_nps_pkt_err_intr()
94 nitrox_write_csr(ndev, offset, value); in clear_nps_pkt_err_intr()
104 nitrox_write_csr(ndev, offset, value); in clear_nps_pkt_err_intr()
115 nitrox_write_csr(ndev, POM_INT, value); in clear_pom_err_intr()
124 nitrox_write_csr(ndev, PEM0_INT, value); in clear_pem_err_intr()
141 nitrox_write_csr(nde in clear_lbc_err_intr()
[all...]
H A Dnitrox_main.c104 nitrox_write_csr(ndev, offset, block_num); in write_to_ucd_unit()
111 nitrox_write_csr(ndev, offset, data); in write_to_ucd_unit()
163 nitrox_write_csr(ndev, offset, (~0ULL)); in nitrox_load_fw()
179 nitrox_write_csr(ndev, offset, core_2_eid_val.value); in nitrox_load_fw()
215 nitrox_write_csr(ndev, offset, aqm_grp_execmask_lo.value); in nitrox_load_fw()
218 nitrox_write_csr(ndev, offset, aqm_grp_execmask_hi.value); in nitrox_load_fw()
234 nitrox_write_csr(ndev, offset, core_2_eid_val.value); in nitrox_load_fw()
H A Dnitrox_mbx.c51 nitrox_write_csr(ndev, reg_addr, value); in pf2vf_write_mbox()
147 nitrox_write_csr(ndev, reg_addr, BIT_ULL(i)); in nitrox_pf2vf_mbox_handler()
170 nitrox_write_csr(ndev, reg_addr, BIT_ULL(i)); in nitrox_pf2vf_mbox_handler()
H A Dnitrox_dev.h281 * nitrox_write_csr - Write to device register
286 static inline void nitrox_write_csr(struct nitrox_device *ndev, u64 offset, in nitrox_write_csr() function
/kernel/linux/linux-6.6/drivers/crypto/cavium/nitrox/
H A Dnitrox_hal.c31 nitrox_write_csr(ndev, EMU_AE_ENABLEX(i), emu_ae.value); in emu_enable_cores()
32 nitrox_write_csr(ndev, EMU_SE_ENABLEX(i), emu_se.value); in emu_enable_cores()
59 nitrox_write_csr(ndev, offset, emu_wd_int.value); in nitrox_config_emu_unit()
61 nitrox_write_csr(ndev, offset, emu_ge_int.value); in nitrox_config_emu_unit()
76 nitrox_write_csr(ndev, offset, pkt_in_ctl.value); in reset_pkt_input_ring()
90 nitrox_write_csr(ndev, offset, pkt_in_cnts.value); in reset_pkt_input_ring()
105 nitrox_write_csr(ndev, offset, pkt_in_ctl.value); in enable_pkt_input_ring()
138 nitrox_write_csr(ndev, offset, cmdq->dma); in nitrox_config_pkt_input_rings()
144 nitrox_write_csr(ndev, offset, pkt_in_rsize.value); in nitrox_config_pkt_input_rings()
148 nitrox_write_csr(nde in nitrox_config_pkt_input_rings()
[all...]
H A Dnitrox_isr.c48 nitrox_write_csr(ndev, NPS_CORE_INT, value); in clear_nps_core_err_intr()
66 nitrox_write_csr(ndev, offset, value); in clear_nps_pkt_err_intr()
72 nitrox_write_csr(ndev, offset, value); in clear_nps_pkt_err_intr()
82 nitrox_write_csr(ndev, offset, value); in clear_nps_pkt_err_intr()
90 nitrox_write_csr(ndev, offset, value); in clear_nps_pkt_err_intr()
95 nitrox_write_csr(ndev, offset, value); in clear_nps_pkt_err_intr()
105 nitrox_write_csr(ndev, offset, value); in clear_nps_pkt_err_intr()
116 nitrox_write_csr(ndev, POM_INT, value); in clear_pom_err_intr()
125 nitrox_write_csr(ndev, PEM0_INT, value); in clear_pem_err_intr()
142 nitrox_write_csr(nde in clear_lbc_err_intr()
[all...]
H A Dnitrox_main.c94 nitrox_write_csr(ndev, offset, block_num); in write_to_ucd_unit()
101 nitrox_write_csr(ndev, offset, data); in write_to_ucd_unit()
153 nitrox_write_csr(ndev, offset, (~0ULL)); in nitrox_load_fw()
169 nitrox_write_csr(ndev, offset, core_2_eid_val.value); in nitrox_load_fw()
205 nitrox_write_csr(ndev, offset, aqm_grp_execmask_lo.value); in nitrox_load_fw()
208 nitrox_write_csr(ndev, offset, aqm_grp_execmask_hi.value); in nitrox_load_fw()
224 nitrox_write_csr(ndev, offset, core_2_eid_val.value); in nitrox_load_fw()
H A Dnitrox_mbx.c53 nitrox_write_csr(ndev, reg_addr, value); in pf2vf_write_mbox()
151 nitrox_write_csr(ndev, reg_addr, BIT_ULL(i)); in nitrox_pf2vf_mbox_handler()
175 nitrox_write_csr(ndev, reg_addr, BIT_ULL(i)); in nitrox_pf2vf_mbox_handler()
H A Dnitrox_dev.h281 * nitrox_write_csr - Write to device register
286 static inline void nitrox_write_csr(struct nitrox_device *ndev, u64 offset, in nitrox_write_csr() function

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