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Searched refs:mis (Results 1 - 25 of 43) sorted by relevance

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/kernel/linux/linux-5.10/drivers/clocksource/
H A Dtimer-sp.h42 int mis; member
58 void __iomem *mis; member
/kernel/linux/linux-6.6/drivers/clocksource/
H A Dtimer-sp.h42 int mis; member
58 void __iomem *mis; member
/kernel/linux/linux-6.6/drivers/pinctrl/starfive/
H A Dpinctrl-starfive-jh7110-aon.c100 unsigned long mis; in jh7110_aon_irq_handler() local
105 mis = readl_relaxed(sfp->base + JH7110_AON_GPIOMIS); in jh7110_aon_irq_handler()
106 for_each_set_bit(pin, &mis, JH7110_AON_NGPIO) in jh7110_aon_irq_handler()
H A Dpinctrl-starfive-jh7110-sys.c367 unsigned long mis; in jh7110_sys_irq_handler() local
372 mis = readl_relaxed(sfp->base + JH7110_SYS_GPIOMIS0); in jh7110_sys_irq_handler()
373 for_each_set_bit(pin, &mis, 32) in jh7110_sys_irq_handler()
376 mis = readl_relaxed(sfp->base + JH7110_SYS_GPIOMIS1); in jh7110_sys_irq_handler()
377 for_each_set_bit(pin, &mis, 32) in jh7110_sys_irq_handler()
H A Dpinctrl-starfive-jh7100.c1192 unsigned long mis; in starfive_gpio_irq_handler() local
1197 mis = readl_relaxed(sfp->base + GPIOMIS + 0); in starfive_gpio_irq_handler()
1198 for_each_set_bit(pin, &mis, 32) in starfive_gpio_irq_handler()
1201 mis = readl_relaxed(sfp->base + GPIOMIS + 4); in starfive_gpio_irq_handler()
1202 for_each_set_bit(pin, &mis, 32) in starfive_gpio_irq_handler()
/kernel/linux/linux-6.6/fs/ceph/
H A Dmetric.h61 __le32 data_len; /* length of sizeof(hit + mis + total) */
68 __le64 mis; member
103 __le64 mis; member
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce80/
H A Ddce80_resource.c820 if (pool->base.mis[i] != NULL) { in dce80_resource_destruct()
821 kfree(TO_DCE_MEM_INPUT(pool->base.mis[i])); in dce80_resource_destruct()
822 pool->base.mis[i] = NULL; in dce80_resource_destruct()
1057 pool->base.mis[i] = dce80_mem_input_create(ctx, i); in dce80_construct()
1058 if (pool->base.mis[i] == NULL) { in dce80_construct()
1255 pool->base.mis[i] = dce80_mem_input_create(ctx, i); in dce81_construct()
1256 if (pool->base.mis[i] == NULL) { in dce81_construct()
1449 pool->base.mis[i] = dce80_mem_input_create(ctx, i); in dce83_construct()
1450 if (pool->base.mis[i] == NULL) { in dce83_construct()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce60/
H A Ddce60_resource.c815 if (pool->base.mis[i] != NULL) { in dce60_resource_destruct()
816 kfree(TO_DCE_MEM_INPUT(pool->base.mis[i])); in dce60_resource_destruct()
817 pool->base.mis[i] = NULL; in dce60_resource_destruct()
1048 pool->base.mis[i] = dce60_mem_input_create(ctx, i); in dce60_construct()
1049 if (pool->base.mis[i] == NULL) { in dce60_construct()
1246 pool->base.mis[i] = dce60_mem_input_create(ctx, i); in dce61_construct()
1247 if (pool->base.mis[i] == NULL) { in dce61_construct()
1440 pool->base.mis[i] = dce60_mem_input_create(ctx, i); in dce64_construct()
1441 if (pool->base.mis[i] == NULL) { in dce64_construct()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce60/
H A Ddce60_resource.c811 if (pool->base.mis[i] != NULL) { in dce60_resource_destruct()
812 kfree(TO_DCE_MEM_INPUT(pool->base.mis[i])); in dce60_resource_destruct()
813 pool->base.mis[i] = NULL; in dce60_resource_destruct()
1044 pool->base.mis[i] = dce60_mem_input_create(ctx, i); in dce60_construct()
1045 if (pool->base.mis[i] == NULL) { in dce60_construct()
1242 pool->base.mis[i] = dce60_mem_input_create(ctx, i); in dce61_construct()
1243 if (pool->base.mis[i] == NULL) { in dce61_construct()
1436 pool->base.mis[i] = dce60_mem_input_create(ctx, i); in dce64_construct()
1437 if (pool->base.mis[i] == NULL) { in dce64_construct()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce80/
H A Ddce80_resource.c818 if (pool->base.mis[i] != NULL) { in dce80_resource_destruct()
819 kfree(TO_DCE_MEM_INPUT(pool->base.mis[i])); in dce80_resource_destruct()
820 pool->base.mis[i] = NULL; in dce80_resource_destruct()
1058 pool->base.mis[i] = dce80_mem_input_create(ctx, i); in dce80_construct()
1059 if (pool->base.mis[i] == NULL) { in dce80_construct()
1258 pool->base.mis[i] = dce80_mem_input_create(ctx, i); in dce81_construct()
1259 if (pool->base.mis[i] == NULL) { in dce81_construct()
1455 pool->base.mis[i] = dce80_mem_input_create(ctx, i); in dce83_construct()
1456 if (pool->base.mis[i] == NULL) { in dce83_construct()
/kernel/linux/linux-5.10/drivers/crypto/ux500/cryp/
H A Dcryp_irqp.h55 * @mis - Masked interrupt statu register
92 u32 mis; /* Masked interrupt statu register */ member
H A Dcryp_irq.c44 return (readl_relaxed(&device_data->base->mis) & irq_src) > 0; in cryp_pending_irq_src()
/kernel/linux/linux-5.10/arch/x86/events/intel/
H A Dlbr.c841 u64 from, to, mis = 0, pred = 0, in_tx = 0, abort = 0; in intel_pmu_lbr_read_64() local
860 mis = !!(info & LBR_INFO_MISPRED); in intel_pmu_lbr_read_64()
861 pred = !mis; in intel_pmu_lbr_read_64()
868 mis = !!(from & LBR_FROM_FLAG_MISPRED); in intel_pmu_lbr_read_64()
869 pred = !mis; in intel_pmu_lbr_read_64()
877 mis = !!(from & LBR_FROM_FLAG_MISPRED); in intel_pmu_lbr_read_64()
878 pred = !mis; in intel_pmu_lbr_read_64()
901 cpuc->lbr_entries[out].mispred = mis; in intel_pmu_lbr_read_64()
/kernel/linux/linux-5.10/drivers/pinctrl/spear/
H A Dpinctrl-plgpio.c47 u32 mis; /* mask interrupt status register */ member
373 pending = readl_relaxed(plgpio->base + plgpio->regs.mis + in plgpio_irq_handler()
379 writel_relaxed(~pending, plgpio->base + plgpio->regs.mis + in plgpio_irq_handler()
498 if (!of_property_read_u32(np, "st-plgpio,mis-reg", &val)) { in plgpio_probe_dt()
499 plgpio->regs.mis = val; in plgpio_probe_dt()
501 dev_err(&pdev->dev, "DT: Invalid mis reg\n"); in plgpio_probe_dt()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_resource.c833 if (pool->base.mis[i] != NULL) { in dce110_resource_destruct()
834 kfree(TO_DCE_MEM_INPUT(pool->base.mis[i])); in dce110_resource_destruct()
835 pool->base.mis[i] = NULL; in dce110_resource_destruct()
1143 pipe_ctx->plane_res.mi = pool->mis[underlay_idx]; in dce110_acquire_underlay()
1276 pool->mis[pool->pipe_count] = &dce110_miv->base; in underlay_create()
1453 pool->base.mis[i] = dce110_mem_input_create(ctx, i); in dce110_resource_construct()
1454 if (pool->base.mis[i] == NULL) { in dce110_resource_construct()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_resource.c826 if (pool->base.mis[i] != NULL) { in dce110_resource_destruct()
827 kfree(TO_DCE_MEM_INPUT(pool->base.mis[i])); in dce110_resource_destruct()
828 pool->base.mis[i] = NULL; in dce110_resource_destruct()
1138 pipe_ctx->plane_res.mi = pool->mis[underlay_idx]; in dce110_acquire_underlay()
1271 pool->mis[pool->pipe_count] = &dce110_miv->base; in underlay_create()
1452 pool->base.mis[i] = dce110_mem_input_create(ctx, i); in dce110_resource_construct()
1453 if (pool->base.mis[i] == NULL) { in dce110_resource_construct()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce100/
H A Ddce100_resource.c772 if (pool->base.mis[i] != NULL) { in dce100_resource_destruct()
773 kfree(TO_DCE_MEM_INPUT(pool->base.mis[i])); in dce100_resource_destruct()
774 pool->base.mis[i] = NULL; in dce100_resource_destruct()
1091 pool->base.mis[i] = dce100_mem_input_create(ctx, i); in dce100_resource_construct()
1092 if (pool->base.mis[i] == NULL) { in dce100_resource_construct()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce100/
H A Ddce100_resource.c770 if (pool->base.mis[i] != NULL) { in dce100_resource_destruct()
771 kfree(TO_DCE_MEM_INPUT(pool->base.mis[i])); in dce100_resource_destruct()
772 pool->base.mis[i] = NULL; in dce100_resource_destruct()
1092 pool->base.mis[i] = dce100_mem_input_create(ctx, i); in dce100_resource_construct()
1093 if (pool->base.mis[i] == NULL) { in dce100_resource_construct()
/kernel/linux/linux-6.6/arch/x86/events/intel/
H A Dlbr.c761 u64 from, to, mis = 0, pred = 0, in_tx = 0, abort = 0; in intel_pmu_lbr_read_64() local
779 mis = !!(info & LBR_INFO_MISPRED); in intel_pmu_lbr_read_64()
780 pred = !mis; in intel_pmu_lbr_read_64()
791 mis = !!(from & LBR_FROM_FLAG_MISPRED); in intel_pmu_lbr_read_64()
792 pred = !mis; in intel_pmu_lbr_read_64()
822 br[out].mispred = mis; in intel_pmu_lbr_read_64()
/kernel/linux/linux-5.10/fs/ceph/
H A Dmetric.h41 __le32 data_len; /* length of sizeof(hit + mis + total) */
43 __le64 mis; member
/kernel/linux/linux-6.6/drivers/pinctrl/spear/
H A Dpinctrl-plgpio.c49 u32 mis; /* mask interrupt status register */ member
385 regmap_read(plgpio->regmap, plgpio->regs.mis + in plgpio_irq_handler()
391 regmap_write(plgpio->regmap, plgpio->regs.mis + in plgpio_irq_handler()
510 if (!of_property_read_u32(np, "st-plgpio,mis-reg", &val)) { in plgpio_probe_dt()
511 plgpio->regs.mis = val; in plgpio_probe_dt()
513 dev_err(&pdev->dev, "DT: Invalid mis reg\n"); in plgpio_probe_dt()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce112/
H A Ddce112_resource.c793 if (pool->base.mis[i] != NULL) { in dce112_resource_destruct()
794 kfree(TO_DCE_MEM_INPUT(pool->base.mis[i])); in dce112_resource_destruct()
795 pool->base.mis[i] = NULL; in dce112_resource_destruct()
1336 pool->base.mis[i] = dce112_mem_input_create(ctx, i); in dce112_resource_construct()
1337 if (pool->base.mis[i] == NULL) { in dce112_resource_construct()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce120/
H A Ddce120_resource.c618 if (pool->base.mis[i] != NULL) { in dce120_resource_destruct()
619 kfree(TO_DCE_MEM_INPUT(pool->base.mis[i])); in dce120_resource_destruct()
620 pool->base.mis[i] = NULL; in dce120_resource_destruct()
1184 pool->base.mis[j] = dce120_mem_input_create(ctx, i); in dce120_resource_construct()
1186 if (pool->base.mis[j] == NULL) { in dce120_resource_construct()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce120/
H A Ddce120_resource.c610 if (pool->base.mis[i] != NULL) { in dce120_resource_destruct()
611 kfree(TO_DCE_MEM_INPUT(pool->base.mis[i])); in dce120_resource_destruct()
612 pool->base.mis[i] = NULL; in dce120_resource_destruct()
1179 pool->base.mis[j] = dce120_mem_input_create(ctx, i); in dce120_resource_construct()
1181 if (pool->base.mis[j] == NULL) { in dce120_resource_construct()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce112/
H A Ddce112_resource.c791 if (pool->base.mis[i] != NULL) { in dce112_resource_destruct()
792 kfree(TO_DCE_MEM_INPUT(pool->base.mis[i])); in dce112_resource_destruct()
793 pool->base.mis[i] = NULL; in dce112_resource_destruct()
1339 pool->base.mis[i] = dce112_mem_input_create(ctx, i); in dce112_resource_construct()
1340 if (pool->base.mis[i] == NULL) { in dce112_resource_construct()

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