162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * ARM timer implementation, found in Integrator, Versatile and Realview
462306a36Sopenharmony_ci * platforms.  Not all platforms support all registers and bits in these
562306a36Sopenharmony_ci * registers, so we mark them with A for Integrator AP, C for Integrator
662306a36Sopenharmony_ci * CP, V for Versatile and R for Realview.
762306a36Sopenharmony_ci *
862306a36Sopenharmony_ci * Integrator AP has 16-bit timers, Integrator CP, Versatile and Realview
962306a36Sopenharmony_ci * can have 16-bit or 32-bit selectable via a bit in the control register.
1062306a36Sopenharmony_ci *
1162306a36Sopenharmony_ci * Every SP804 contains two identical timers.
1262306a36Sopenharmony_ci */
1362306a36Sopenharmony_ci#define NR_TIMERS	2
1462306a36Sopenharmony_ci#define TIMER_1_BASE	0x00
1562306a36Sopenharmony_ci#define TIMER_2_BASE	0x20
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ci#define TIMER_LOAD	0x00			/* ACVR rw */
1862306a36Sopenharmony_ci#define TIMER_VALUE	0x04			/* ACVR ro */
1962306a36Sopenharmony_ci#define TIMER_CTRL	0x08			/* ACVR rw */
2062306a36Sopenharmony_ci#define TIMER_CTRL_ONESHOT	(1 << 0)	/*  CVR */
2162306a36Sopenharmony_ci#define TIMER_CTRL_32BIT	(1 << 1)	/*  CVR */
2262306a36Sopenharmony_ci#define TIMER_CTRL_DIV1		(0 << 2)	/* ACVR */
2362306a36Sopenharmony_ci#define TIMER_CTRL_DIV16	(1 << 2)	/* ACVR */
2462306a36Sopenharmony_ci#define TIMER_CTRL_DIV256	(2 << 2)	/* ACVR */
2562306a36Sopenharmony_ci#define TIMER_CTRL_IE		(1 << 5)	/*   VR */
2662306a36Sopenharmony_ci#define TIMER_CTRL_PERIODIC	(1 << 6)	/* ACVR */
2762306a36Sopenharmony_ci#define TIMER_CTRL_ENABLE	(1 << 7)	/* ACVR */
2862306a36Sopenharmony_ci
2962306a36Sopenharmony_ci#define TIMER_INTCLR	0x0c			/* ACVR wo */
3062306a36Sopenharmony_ci#define TIMER_RIS	0x10			/*  CVR ro */
3162306a36Sopenharmony_ci#define TIMER_MIS	0x14			/*  CVR ro */
3262306a36Sopenharmony_ci#define TIMER_BGLOAD	0x18			/*  CVR rw */
3362306a36Sopenharmony_ci
3462306a36Sopenharmony_cistruct sp804_timer {
3562306a36Sopenharmony_ci	int load;
3662306a36Sopenharmony_ci	int load_h;
3762306a36Sopenharmony_ci	int value;
3862306a36Sopenharmony_ci	int value_h;
3962306a36Sopenharmony_ci	int ctrl;
4062306a36Sopenharmony_ci	int intclr;
4162306a36Sopenharmony_ci	int ris;
4262306a36Sopenharmony_ci	int mis;
4362306a36Sopenharmony_ci	int bgload;
4462306a36Sopenharmony_ci	int bgload_h;
4562306a36Sopenharmony_ci	int timer_base[NR_TIMERS];
4662306a36Sopenharmony_ci	int width;
4762306a36Sopenharmony_ci};
4862306a36Sopenharmony_ci
4962306a36Sopenharmony_cistruct sp804_clkevt {
5062306a36Sopenharmony_ci	void __iomem *base;
5162306a36Sopenharmony_ci	void __iomem *load;
5262306a36Sopenharmony_ci	void __iomem *load_h;
5362306a36Sopenharmony_ci	void __iomem *value;
5462306a36Sopenharmony_ci	void __iomem *value_h;
5562306a36Sopenharmony_ci	void __iomem *ctrl;
5662306a36Sopenharmony_ci	void __iomem *intclr;
5762306a36Sopenharmony_ci	void __iomem *ris;
5862306a36Sopenharmony_ci	void __iomem *mis;
5962306a36Sopenharmony_ci	void __iomem *bgload;
6062306a36Sopenharmony_ci	void __iomem *bgload_h;
6162306a36Sopenharmony_ci	unsigned long reload;
6262306a36Sopenharmony_ci	int width;
6362306a36Sopenharmony_ci};
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