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Searched refs:min_sclk (Results 1 - 22 of 22) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu10_hwmgr.c595 uint32_t min_sclk = hwmgr->display_config->min_core_set_clock; in smu10_dpm_force_dpm_level() local
605 if (min_sclk < data->gfx_min_freq_limit) in smu10_dpm_force_dpm_level()
606 min_sclk = data->gfx_min_freq_limit; in smu10_dpm_force_dpm_level()
608 min_sclk /= 100; /* transfer 10KHz to MHz */ in smu10_dpm_force_dpm_level()
652 min_sclk, in smu10_dpm_force_dpm_level()
656 min_sclk, in smu10_dpm_force_dpm_level()
707 min_sclk, in smu10_dpm_force_dpm_level()
H A Dvega12_hwmgr.c795 hwmgr->default_compute_power_profile.min_sclk =
2635 uint32_t min_sclk, uint32_t min_mclk)
2643 dpm_table->gfx_table.dpm_levels[i].value >= min_sclk) {
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu10_hwmgr.c628 uint32_t min_sclk = hwmgr->display_config->min_core_set_clock; in smu10_dpm_force_dpm_level() local
639 if (min_sclk < data->gfx_min_freq_limit) in smu10_dpm_force_dpm_level()
640 min_sclk = data->gfx_min_freq_limit; in smu10_dpm_force_dpm_level()
642 min_sclk /= 100; /* transfer 10KHz to MHz */ in smu10_dpm_force_dpm_level()
702 min_sclk, in smu10_dpm_force_dpm_level()
706 min_sclk, in smu10_dpm_force_dpm_level()
781 min_sclk, in smu10_dpm_force_dpm_level()
H A Dvega12_hwmgr.c794 hwmgr->default_compute_power_profile.min_sclk =
2657 uint32_t min_sclk, uint32_t min_mclk)
2665 dpm_table->gfx_table.dpm_levels[i].value >= min_sclk) {
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H A Dtrinity_dpm.h79 u32 min_sclk; member
H A Dsumo_dpm.h83 u32 min_sclk; member
H A Dsumo_dpm.c1047 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in sumo_patch_thermal_state()
1094 u32 min_sclk = pi->sys_info.min_sclk; /* XXX check against disp reqs */ in sumo_apply_state_adjust_rules() local
1095 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in sumo_apply_state_adjust_rules()
1115 if (ps->levels[i].sclk < min_sclk) in sumo_apply_state_adjust_rules()
1117 sumo_get_valid_engine_clock(rdev, min_sclk); in sumo_apply_state_adjust_rules()
1677 pi->sys_info.min_sclk = le32_to_cpu(igp_info->info_6.ulMinEngineClock); in sumo_parse_sys_info_table()
H A Dtrinity_dpm.c1403 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in trinity_patch_thermal_state()
1542 u32 min_sclk = pi->sys_info.min_sclk; /* XXX check against disp reqs */ in trinity_apply_state_adjust_rules() local
1543 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in trinity_apply_state_adjust_rules()
1566 if (ps->levels[i].sclk < min_sclk) in trinity_apply_state_adjust_rules()
1568 trinity_get_valid_engine_clock(rdev, min_sclk); in trinity_apply_state_adjust_rules()
1868 pi->sys_info.min_sclk = le32_to_cpu(igp_info->info_7.ulMinEngineClock); in trinity_parse_sys_info_table()
H A Dni_dpm.c2463 u32 min_sclk; in ni_populate_power_containment_values() local
2514 min_sclk = max_sclk; in ni_populate_power_containment_values()
2516 min_sclk = prev_sclk; in ni_populate_power_containment_values()
2518 min_sclk = (prev_sclk * (u32)max_ps_percent) / 100; in ni_populate_power_containment_values()
2520 if (min_sclk < state->performance_levels[0].sclk) in ni_populate_power_containment_values()
2521 min_sclk = state->performance_levels[0].sclk; in ni_populate_power_containment_values()
2523 if (min_sclk == 0) in ni_populate_power_containment_values()
2527 (u8)((NISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk); in ni_populate_power_containment_values()
H A Dsi_dpm.c2279 u32 min_sclk; in si_populate_power_containment_values() local
2319 min_sclk = max_sclk; in si_populate_power_containment_values()
2321 min_sclk = prev_sclk; in si_populate_power_containment_values()
2323 min_sclk = (prev_sclk * (u32)max_ps_percent) / 100; in si_populate_power_containment_values()
2326 if (min_sclk < state->performance_levels[0].sclk) in si_populate_power_containment_values()
2327 min_sclk = state->performance_levels[0].sclk; in si_populate_power_containment_values()
2329 if (min_sclk == 0) in si_populate_power_containment_values()
2353 smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk); in si_populate_power_containment_values()
H A Dkv_dpm.c2144 u32 min_sclk = 10000; /* ??? */ in kv_apply_state_adjust_rules() local
2163 sclk = min_sclk; in kv_apply_state_adjust_rules()
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H A Dtrinity_dpm.h79 u32 min_sclk; member
H A Dsumo_dpm.h83 u32 min_sclk; member
H A Dsumo_dpm.c1047 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in sumo_patch_thermal_state()
1094 u32 min_sclk = pi->sys_info.min_sclk; /* XXX check against disp reqs */ in sumo_apply_state_adjust_rules() local
1095 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in sumo_apply_state_adjust_rules()
1115 if (ps->levels[i].sclk < min_sclk) in sumo_apply_state_adjust_rules()
1117 sumo_get_valid_engine_clock(rdev, min_sclk); in sumo_apply_state_adjust_rules()
1677 pi->sys_info.min_sclk = le32_to_cpu(igp_info->info_6.ulMinEngineClock); in sumo_parse_sys_info_table()
H A Dtrinity_dpm.c1359 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in trinity_patch_thermal_state()
1498 u32 min_sclk = pi->sys_info.min_sclk; /* XXX check against disp reqs */ in trinity_apply_state_adjust_rules() local
1499 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in trinity_apply_state_adjust_rules()
1522 if (ps->levels[i].sclk < min_sclk) in trinity_apply_state_adjust_rules()
1524 trinity_get_valid_engine_clock(rdev, min_sclk); in trinity_apply_state_adjust_rules()
1824 pi->sys_info.min_sclk = le32_to_cpu(igp_info->info_7.ulMinEngineClock); in trinity_parse_sys_info_table()
H A Dni_dpm.c2464 u32 min_sclk; in ni_populate_power_containment_values() local
2515 min_sclk = max_sclk; in ni_populate_power_containment_values()
2517 min_sclk = prev_sclk; in ni_populate_power_containment_values()
2519 min_sclk = (prev_sclk * (u32)max_ps_percent) / 100; in ni_populate_power_containment_values()
2521 if (min_sclk < state->performance_levels[0].sclk) in ni_populate_power_containment_values()
2522 min_sclk = state->performance_levels[0].sclk; in ni_populate_power_containment_values()
2524 if (min_sclk == 0) in ni_populate_power_containment_values()
2528 (u8)((NISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk); in ni_populate_power_containment_values()
H A Dsi_dpm.c2276 u32 min_sclk; in si_populate_power_containment_values() local
2316 min_sclk = max_sclk; in si_populate_power_containment_values()
2318 min_sclk = prev_sclk; in si_populate_power_containment_values()
2320 min_sclk = (prev_sclk * (u32)max_ps_percent) / 100; in si_populate_power_containment_values()
2323 if (min_sclk < state->performance_levels[0].sclk) in si_populate_power_containment_values()
2324 min_sclk = state->performance_levels[0].sclk; in si_populate_power_containment_values()
2326 if (min_sclk == 0) in si_populate_power_containment_values()
2350 smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk); in si_populate_power_containment_values()
H A Dkv_dpm.c1941 u32 min_sclk = 10000; /* ??? */ in kv_apply_state_adjust_rules() local
1960 sclk = min_sclk; in kv_apply_state_adjust_rules()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/
H A Dsi_dpm.c2375 u32 min_sclk; in si_populate_power_containment_values() local
2415 min_sclk = max_sclk; in si_populate_power_containment_values()
2417 min_sclk = prev_sclk; in si_populate_power_containment_values()
2419 min_sclk = (prev_sclk * (u32)max_ps_percent) / 100; in si_populate_power_containment_values()
2421 if (min_sclk < state->performance_levels[0].sclk) in si_populate_power_containment_values()
2422 min_sclk = state->performance_levels[0].sclk; in si_populate_power_containment_values()
2424 if (min_sclk == 0) in si_populate_power_containment_values()
2448 smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk); in si_populate_power_containment_values()
H A Dkv_dpm.c2198 u32 min_sclk = 10000; /* ??? */ in kv_apply_state_adjust_rules() local
2217 sclk = min_sclk; in kv_apply_state_adjust_rules()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.c2390 u32 min_sclk; in si_populate_power_containment_values() local
2430 min_sclk = max_sclk; in si_populate_power_containment_values()
2432 min_sclk = prev_sclk; in si_populate_power_containment_values()
2434 min_sclk = (prev_sclk * (u32)max_ps_percent) / 100; in si_populate_power_containment_values()
2436 if (min_sclk < state->performance_levels[0].sclk) in si_populate_power_containment_values()
2437 min_sclk = state->performance_levels[0].sclk; in si_populate_power_containment_values()
2439 if (min_sclk == 0) in si_populate_power_containment_values()
2463 smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk); in si_populate_power_containment_values()
H A Dkv_dpm.c2200 u32 min_sclk = 10000; /* ??? */ in kv_apply_state_adjust_rules() local
2219 sclk = min_sclk; in kv_apply_state_adjust_rules()

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