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Searched refs:mask_base (Results 1 - 25 of 135) sorted by relevance

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/kernel/linux/linux-6.6/drivers/mfd/
H A Dmax77541.c27 .mask_base = MAX77541_REG_INT_SRC_M,
45 .mask_base = MAX77541_REG_TOPSYS_INT_M,
61 .mask_base = MAX77541_REG_BUCK_INT_M,
77 .mask_base = MAX77541_REG_ADC_INT_M,
H A Dintel_soc_pmic_bxtwc.c144 .mask_base = BXTWC_MIRQLVL1,
153 .mask_base = BXTWC_MPWRBTNIRQ,
162 .mask_base = BXTWC_MTMUIRQ,
171 .mask_base = BXTWC_MBCUIRQ,
180 .mask_base = BXTWC_MADCIRQ,
189 .mask_base = BXTWC_MCHGR0IRQ,
198 .mask_base = BXTWC_MCRITIRQ,
H A Dsec-irq.c305 .mask_base = S2MPS11_REG_INT1M,
314 .mask_base = S2MPS14_REG_INT1M, \
338 .mask_base = S2MPU02_REG_INT1M,
348 .mask_base = S5M8767_REG_INT1M,
H A Dda9063-irq.c94 .mask_base = DA9063_REG_IRQ_MASK_A,
166 .mask_base = DA9063_REG_IRQ_MASK_A,
H A Dmax77693.c68 .mask_base = MAX77693_LED_REG_FLASH_INT_MASK,
83 .mask_base = MAX77693_PMIC_REG_TOPSYS_INT_MASK,
100 .mask_base = MAX77693_CHG_REG_CHG_INT_MASK,
H A Dmax8907.c131 .mask_base = MAX8907_REG_CHG_IRQ1_MASK,
155 .mask_base = MAX8907_REG_ON_OFF_IRQ1_MASK,
170 .mask_base = MAX8907_REG_RTC_IRQ_MASK,
H A Dretu-mfd.c80 .mask_base = RETU_REG_IMR,
116 .mask_base = TAHVO_REG_IMR,
265 ret = retu_write(rdev, rdat->irq_chip->mask_base, 0xffff); in retu_probe()
H A Dmotorola-cpcap.c98 .mask_base = CPCAP_REG_MIM1,
107 .mask_base = CPCAP_REG_MIM2,
116 .mask_base = CPCAP_REG_INTM1,
H A Drk8xx-core.c456 .mask_base = RK805_INT_STS_MSK_REG,
467 .mask_base = RK806_INT_MSK0,
480 .mask_base = RK808_INT_STS_MSK_REG1,
492 .mask_base = RK817_INT_STS_MSK_REG0,
504 .mask_base = RK818_INT_STS_MSK_REG1,
H A Dbd9571mwv.c99 .mask_base = BD9571MWV_INT_INTMASK,
165 .mask_base = BD9571MWV_INT_INTMASK,
H A Dmax77686.c132 .mask_base = MAX77686_REG_INT1MSK,
141 .mask_base = MAX77802_REG_INT1MSK,
/kernel/linux/linux-5.10/drivers/mfd/
H A Dsec-irq.c381 .mask_base = S2MPS11_REG_INT1M,
390 .mask_base = S2MPS14_REG_INT1M, \
414 .mask_base = S2MPU02_REG_INT1M,
424 .mask_base = S5M8767_REG_INT1M,
434 .mask_base = S5M8763_REG_IRQM1,
H A Dintel_soc_pmic_bxtwc.c143 .mask_base = BXTWC_MIRQLVL1,
152 .mask_base = BXTWC_MPWRBTNIRQ,
161 .mask_base = BXTWC_MTMUIRQ,
170 .mask_base = BXTWC_MBCUIRQ,
179 .mask_base = BXTWC_MADCIRQ,
188 .mask_base = BXTWC_MCHGR0IRQ,
197 .mask_base = BXTWC_MCRITIRQ,
H A Dmax77693.c68 .mask_base = MAX77693_LED_REG_FLASH_INT_MASK,
84 .mask_base = MAX77693_PMIC_REG_TOPSYS_INT_MASK,
102 .mask_base = MAX77693_CHG_REG_CHG_INT_MASK,
139 .mask_base = MAX77693_MUIC_REG_INTMASK1,
H A Dda9063-irq.c94 .mask_base = DA9063_REG_IRQ_MASK_A,
166 .mask_base = DA9063_REG_IRQ_MASK_A,
H A Daxp20x.c509 .mask_base = AXP152_IRQ1_EN,
521 .mask_base = AXP20X_IRQ1_EN,
534 .mask_base = AXP20X_IRQ1_EN,
546 .mask_base = AXP20X_IRQ1_EN,
559 .mask_base = AXP20X_IRQ1_EN,
571 .mask_base = AXP20X_IRQ1_EN,
583 .mask_base = AXP20X_IRQ1_EN,
H A Dmax8907.c132 .mask_base = MAX8907_REG_CHG_IRQ1_MASK,
156 .mask_base = MAX8907_REG_ON_OFF_IRQ1_MASK,
171 .mask_base = MAX8907_REG_RTC_IRQ_MASK,
H A Dmotorola-cpcap.c98 .mask_base = CPCAP_REG_MIM1,
107 .mask_base = CPCAP_REG_MIM2,
116 .mask_base = CPCAP_REG_INTM1,
H A Dretu-mfd.c80 .mask_base = RETU_REG_IMR,
116 .mask_base = TAHVO_REG_IMR,
265 ret = retu_write(rdev, rdat->irq_chip->mask_base, 0xffff); in retu_probe()
H A Drk808.c407 .mask_base = RK805_INT_STS_MSK_REG,
419 .mask_base = RK808_INT_STS_MSK_REG1,
431 .mask_base = RK817_INT_STS_MSK_REG0,
443 .mask_base = RK818_INT_STS_MSK_REG1,
H A Dmax77686.c133 .mask_base = MAX77686_REG_INT1MSK,
142 .mask_base = MAX77802_REG_INT1MSK,
H A Dmax14577.c212 .mask_base = MAX14577_REG_INTMASK1,
242 .mask_base = MAX14577_REG_INTMASK1,
257 .mask_base = MAX77836_PMIC_REG_TOPSYS_INT_MASK,
/kernel/linux/linux-6.6/drivers/pci/msi/
H A Dmsi.h26 return desc->pci.mask_base + desc->msi_index * PCI_MSIX_ENTRY_SIZE; in pci_msix_desc_addr()
48 readl(desc->pci.mask_base); in pci_msix_mask()
/kernel/linux/linux-5.10/drivers/base/regmap/
H A Dregmap-irq.c108 if (!d->chip->mask_base) in regmap_irq_sync_unlock()
111 reg = d->chip->mask_base + in regmap_irq_sync_unlock()
117 /* set mask with mask_base register */ in regmap_irq_sync_unlock()
125 d->chip->mask_base; in regmap_irq_sync_unlock()
697 if (!chip->mask_base) in regmap_add_irq_chip_fwnode()
700 reg = chip->mask_base + in regmap_add_irq_chip_fwnode()
707 d->chip->mask_base; in regmap_add_irq_chip_fwnode()
/kernel/linux/linux-5.10/drivers/irqchip/
H A Dirq-sl28cpld.c68 irqchip->chip.mask_base = base + INTC_IE; in sl28cpld_intc_probe()

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