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Searched refs:freg (Results 1 - 13 of 13) sorted by relevance

/kernel/linux/linux-5.10/arch/sparc/math-emu/
H A Dmath_64.c177 int freg; in do_mathemu() local
299 freg = ((XR >> 2) ^ XR) & 2; in do_mathemu()
303 case 2: if ((XR & 4) || freg) IR = 1; break; /* Less or Equal */ in do_mathemu()
304 case 3: if (freg) IR = 1; break; /* Less */ in do_mathemu()
319 freg = (insn >> 14) & 0x1f; in do_mathemu()
320 if (!freg) in do_mathemu()
322 else if (freg < 16) in do_mathemu()
323 XR = regs->u_regs[freg]; in do_mathemu()
328 get_user(XR, &win32->locals[freg - 16]); in do_mathemu()
333 get_user(XR, &win->locals[freg in do_mathemu()
[all...]
H A Dmath_32.c283 int freg; in do_one_mathemu() local
350 freg = (*pfsr >> 14) & 0xf; in do_one_mathemu()
354 freg = ((insn >> 14) & 0x1f); in do_one_mathemu()
357 if (freg & 3) { /* quadwords must have bits 4&5 of the */ in do_one_mathemu()
364 if (freg & 1) { /* doublewords must have bit 5 zeroed */ in do_one_mathemu()
369 rs1 = (argp)&fregs[freg]; in do_one_mathemu()
375 freg = (insn & 0x1f); in do_one_mathemu()
378 if (freg & 3) { /* quadwords must have bits 4&5 of the */ in do_one_mathemu()
385 if (freg & 1) { /* doublewords must have bit 5 zeroed */ in do_one_mathemu()
390 rs2 = (argp)&fregs[freg]; in do_one_mathemu()
[all...]
/kernel/linux/linux-6.6/arch/sparc/math-emu/
H A Dmath_64.c177 int freg; in do_mathemu() local
299 freg = ((XR >> 2) ^ XR) & 2; in do_mathemu()
303 case 2: if ((XR & 4) || freg) IR = 1; break; /* Less or Equal */ in do_mathemu()
304 case 3: if (freg) IR = 1; break; /* Less */ in do_mathemu()
319 freg = (insn >> 14) & 0x1f; in do_mathemu()
320 if (!freg) in do_mathemu()
322 else if (freg < 16) in do_mathemu()
323 XR = regs->u_regs[freg]; in do_mathemu()
328 get_user(XR, &win32->locals[freg - 16]); in do_mathemu()
333 get_user(XR, &win->locals[freg in do_mathemu()
[all...]
H A Dmath_32.c283 int freg; in do_one_mathemu() local
350 freg = (*pfsr >> 14) & 0xf; in do_one_mathemu()
354 freg = ((insn >> 14) & 0x1f); in do_one_mathemu()
357 if (freg & 3) { /* quadwords must have bits 4&5 of the */ in do_one_mathemu()
364 if (freg & 1) { /* doublewords must have bit 5 zeroed */ in do_one_mathemu()
369 rs1 = (argp)&fregs[freg]; in do_one_mathemu()
375 freg = (insn & 0x1f); in do_one_mathemu()
378 if (freg & 3) { /* quadwords must have bits 4&5 of the */ in do_one_mathemu()
385 if (freg & 1) { /* doublewords must have bit 5 zeroed */ in do_one_mathemu()
390 rs2 = (argp)&fregs[freg]; in do_one_mathemu()
[all...]
/kernel/liteos_m/arch/risc-v/nuclei/gcc/nmsis/Core/Include/
H A Dcore_feature_fpu.h90 * \brief Load a single-precision value from memory into float point register freg using flw instruction
92 * address (addr + ofs) into floating point register freg(f0-f31)
93 * \param [in] freg The floating point register, eg. FREG(0), f0
103 #define __RV_FLW(freg, addr, ofs) \
106 __ASM volatile("flw " STRINGIFY(freg) ", %0(%1) " \
112 * \brief Store a single-precision value from float point freg into memory using fsw instruction
114 * \param [in] freg The floating point register(f0-f31), eg. FREG(0), f0
124 #define __RV_FSW(freg, addr, ofs) \
127 __ASM volatile("fsw " STRINGIFY(freg) ", %0(%1) " \
133 * \brief Load a double-precision value from memory into float point register freg usin
[all...]
/kernel/linux/linux-5.10/arch/sparc/kernel/
H A Dunaligned_64.c440 int freg; in handle_ldf_stq() local
453 freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20); in handle_ldf_stq()
454 flag = (freg < 32) ? FPRS_DL : FPRS_DU; in handle_ldf_stq()
455 if (freg & 3) { in handle_ldf_stq()
461 first = *(u64 *)&f->regs[freg]; in handle_ldf_stq()
462 second = *(u64 *)&f->regs[freg+2]; in handle_ldf_stq()
520 freg = (insn >> 25) & 0x1f; in handle_ldf_stq()
522 freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20); in handle_ldf_stq()
523 flag = (freg < 32) ? FPRS_DL : FPRS_DU; in handle_ldf_stq()
558 if (freg < 3 in handle_ldf_stq()
603 u8 freg; handle_lddfmna() local
667 u8 freg; handle_stdfmna() local
[all...]
/kernel/linux/linux-6.6/arch/sparc/kernel/
H A Dunaligned_64.c440 int freg; in handle_ldf_stq() local
453 freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20); in handle_ldf_stq()
454 flag = (freg < 32) ? FPRS_DL : FPRS_DU; in handle_ldf_stq()
455 if (freg & 3) { in handle_ldf_stq()
461 first = *(u64 *)&f->regs[freg]; in handle_ldf_stq()
462 second = *(u64 *)&f->regs[freg+2]; in handle_ldf_stq()
520 freg = (insn >> 25) & 0x1f; in handle_ldf_stq()
522 freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20); in handle_ldf_stq()
523 flag = (freg < 32) ? FPRS_DL : FPRS_DU; in handle_ldf_stq()
558 if (freg < 3 in handle_ldf_stq()
603 u8 freg; handle_lddfmna() local
667 u8 freg; handle_stdfmna() local
[all...]
/kernel/linux/linux-5.10/arch/powerpc/kernel/ptrace/
H A Dptrace32.c229 unsigned long freg; in compat_arch_ptrace() local
230 ret = ptrace_get_reg(child, numReg, &freg); in compat_arch_ptrace()
234 freg = (freg & ~0xfffffffful) | (data & 0xfffffffful); in compat_arch_ptrace()
236 freg = (freg & 0xfffffffful) | (data << 32); in compat_arch_ptrace()
237 ret = ptrace_put_reg(child, numReg, freg); in compat_arch_ptrace()
/kernel/linux/linux-6.6/arch/powerpc/kernel/ptrace/
H A Dptrace32.c227 unsigned long freg; in compat_arch_ptrace() local
228 ret = ptrace_get_reg(child, numReg, &freg); in compat_arch_ptrace()
232 freg = (freg & ~0xfffffffful) | (data & 0xfffffffful); in compat_arch_ptrace()
234 freg = (freg & 0xfffffffful) | (data << 32); in compat_arch_ptrace()
235 ret = ptrace_put_reg(child, numReg, freg); in compat_arch_ptrace()
/kernel/linux/linux-5.10/arch/powerpc/include/asm/
H A Dexception-64e.h125 #define TLB_MISS_RESTORE(freg) \
130 mtspr SPRN_SPRG_TLB_EXFRAME,freg; \
/kernel/linux/linux-6.6/arch/powerpc/include/asm/
H A Dexception-64e.h125 #define TLB_MISS_RESTORE(freg) \
130 mtspr SPRN_SPRG_TLB_EXFRAME,freg; \
/kernel/linux/linux-5.10/arch/x86/
H A DMakefile73 KBUILD_CFLAGS += -msoft-float -mregparm=3 -freg-struct-return
/kernel/linux/linux-6.6/arch/x86/
H A DMakefile96 KBUILD_CFLAGS += -msoft-float -mregparm=3 -freg-struct-return

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