| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/legacy-dpm/ |
| H A D | legacy_dpm.c | 273 ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk, in amdgpu_parse_extended_power_table()
282 ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in amdgpu_parse_extended_power_table()
291 ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in amdgpu_parse_extended_power_table()
300 ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.mvdd_dependency_on_mclk, in amdgpu_parse_extended_power_table()
311 adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk = in amdgpu_parse_extended_power_table()
314 adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk = in amdgpu_parse_extended_power_table()
317 adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc = in amdgpu_parse_extended_power_table()
319 adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddci = in amdgpu_parse_extended_power_table()
330 adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries = in amdgpu_parse_extended_power_table()
334 if (!adev->pm.dpm.dyn_state in amdgpu_parse_extended_power_table()
634 struct amdgpu_dpm_dynamic_state *dyn_state = &adev->pm.dpm.dyn_state; amdgpu_free_extended_power_table() local
[all...] |
| H A D | si_dpm.c | 2251 struct amdgpu_ppm_table *ppm = adev->pm.dpm.dyn_state.ppm_table; in si_populate_smc_tdp_limits()
2632 &adev->pm.dpm.dyn_state.cac_leakage_table; in si_get_cac_std_voltage_max_min()
3036 &adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in si_get_vce_clock_voltage()
3234 return btc_find_valid_clock(&adev->pm.dpm.dyn_state.valid_mclk_values, in btc_get_valid_mclk()
3241 return btc_find_valid_clock(&adev->pm.dpm.dyn_state.valid_sclk_values, in btc_get_valid_sclk()
3294 if (((pl->mclk + (pl->sclk - 1)) / pl->sclk) > adev->pm.dpm.dyn_state.mclk_sclk_ratio) in btc_adjust_clock_combinations()
3298 (adev->pm.dpm.dyn_state.mclk_sclk_ratio - 1)) / in btc_adjust_clock_combinations()
3299 adev->pm.dpm.dyn_state.mclk_sclk_ratio); in btc_adjust_clock_combinations()
3301 if ((pl->sclk - pl->mclk) > adev->pm.dpm.dyn_state.sclk_mclk_delta) in btc_adjust_clock_combinations()
3305 adev->pm.dpm.dyn_state in btc_adjust_clock_combinations()
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| H A D | r600_dpm.c | 926 ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, in r600_parse_extended_power_table()
935 ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in r600_parse_extended_power_table()
938 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries); in r600_parse_extended_power_table()
946 ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in r600_parse_extended_power_table()
949 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries); in r600_parse_extended_power_table()
950 kfree(rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.entries); in r600_parse_extended_power_table()
958 ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk, in r600_parse_extended_power_table()
961 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries); in r600_parse_extended_power_table()
962 kfree(rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.entries); in r600_parse_extended_power_table()
963 kfree(rdev->pm.dpm.dyn_state in r600_parse_extended_power_table()
1300 struct radeon_dpm_dynamic_state *dyn_state = &rdev->pm.dpm.dyn_state; r600_free_extended_power_table() local
[all...] |
| H A D | ci_dpm.c | 268 if (rdev->pm.dpm.dyn_state.cac_leakage_table.entries == NULL) in ci_populate_bapm_vddc_vid_sidd()
270 if (rdev->pm.dpm.dyn_state.cac_leakage_table.count > 8) in ci_populate_bapm_vddc_vid_sidd()
272 if (rdev->pm.dpm.dyn_state.cac_leakage_table.count != in ci_populate_bapm_vddc_vid_sidd()
273 rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count) in ci_populate_bapm_vddc_vid_sidd()
276 for (i = 0; i < rdev->pm.dpm.dyn_state.cac_leakage_table.count; i++) { in ci_populate_bapm_vddc_vid_sidd()
278 lo_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1); in ci_populate_bapm_vddc_vid_sidd()
279 hi_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2); in ci_populate_bapm_vddc_vid_sidd()
280 hi2_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc3); in ci_populate_bapm_vddc_vid_sidd()
282 lo_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc); in ci_populate_bapm_vddc_vid_sidd()
283 hi_vid[i] = ci_convert_to_vid((u16)rdev->pm.dpm.dyn_state in ci_populate_bapm_vddc_vid_sidd()
[all...] |
| H A D | btc_dpm.c | 1231 return btc_find_valid_clock(&rdev->pm.dpm.dyn_state.valid_mclk_values, in btc_get_valid_mclk()
1238 return btc_find_valid_clock(&rdev->pm.dpm.dyn_state.valid_sclk_values, in btc_get_valid_sclk()
1281 if (((pl->mclk + (pl->sclk - 1)) / pl->sclk) > rdev->pm.dpm.dyn_state.mclk_sclk_ratio) in btc_adjust_clock_combinations()
1285 (rdev->pm.dpm.dyn_state.mclk_sclk_ratio - 1)) / in btc_adjust_clock_combinations()
1286 rdev->pm.dpm.dyn_state.mclk_sclk_ratio); in btc_adjust_clock_combinations()
1288 if ((pl->sclk - pl->mclk) > rdev->pm.dpm.dyn_state.sclk_mclk_delta) in btc_adjust_clock_combinations()
1292 rdev->pm.dpm.dyn_state.sclk_mclk_delta); in btc_adjust_clock_combinations()
1319 if ((*vddc - *vddci) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) { in btc_apply_voltage_delta_rules()
1321 (*vddc - rdev->pm.dpm.dyn_state.vddc_vddci_delta)); in btc_apply_voltage_delta_rules()
1325 if ((*vddci - *vddc) > rdev->pm.dpm.dyn_state in btc_apply_voltage_delta_rules()
[all...] |
| H A D | si_dpm.c | 2147 struct radeon_ppm_table *ppm = rdev->pm.dpm.dyn_state.ppm_table; in si_populate_smc_tdp_limits()
2520 &rdev->pm.dpm.dyn_state.cac_leakage_table; in si_get_cac_std_voltage_max_min()
2923 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in si_get_vce_clock_voltage()
3010 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in si_apply_state_adjust_rules()
3012 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in si_apply_state_adjust_rules()
3032 btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, in si_apply_state_adjust_rules()
3034 btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in si_apply_state_adjust_rules()
3036 btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in si_apply_state_adjust_rules()
3138 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, in si_apply_state_adjust_rules()
3141 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state in si_apply_state_adjust_rules()
[all...] |
| H A D | ni_dpm.c | 803 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ni_apply_state_adjust_rules()
805 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ni_apply_state_adjust_rules()
874 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, in ni_apply_state_adjust_rules()
877 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in ni_apply_state_adjust_rules()
880 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in ni_apply_state_adjust_rules()
883 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk, in ni_apply_state_adjust_rules()
897 if (ps->performance_levels[i].vddc > rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc) in ni_apply_state_adjust_rules()
900 if (ps->performance_levels[i].vddc < rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2) in ni_apply_state_adjust_rules()
1013 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk); in ni_patch_dependency_tables_based_on_leakage()
1016 &rdev->pm.dpm.dyn_state in ni_patch_dependency_tables_based_on_leakage()
[all...] |
| H A D | kv_dpm.c | 557 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid2_to_vid7()
579 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid7_to_vid2()
720 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_program_bootup_state()
822 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_populate_uvd_table()
895 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in kv_populate_vce_table()
956 &rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; in kv_populate_samu_table()
1022 &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; in kv_populate_acp_table()
1081 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_calculate_dfs_bypass_settings()
1428 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_update_uvd_dpm()
1464 &rdev->pm.dpm.dyn_state in kv_get_vce_boot_level()
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
| H A D | r600_dpm.c | 926 ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, in r600_parse_extended_power_table()
935 ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in r600_parse_extended_power_table()
938 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries); in r600_parse_extended_power_table()
946 ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in r600_parse_extended_power_table()
949 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries); in r600_parse_extended_power_table()
950 kfree(rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.entries); in r600_parse_extended_power_table()
958 ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk, in r600_parse_extended_power_table()
961 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries); in r600_parse_extended_power_table()
962 kfree(rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.entries); in r600_parse_extended_power_table()
963 kfree(rdev->pm.dpm.dyn_state in r600_parse_extended_power_table()
1300 struct radeon_dpm_dynamic_state *dyn_state = &rdev->pm.dpm.dyn_state; r600_free_extended_power_table() local
[all...] |
| H A D | ci_dpm.c | 259 if (rdev->pm.dpm.dyn_state.cac_leakage_table.entries == NULL) in ci_populate_bapm_vddc_vid_sidd()
261 if (rdev->pm.dpm.dyn_state.cac_leakage_table.count > 8) in ci_populate_bapm_vddc_vid_sidd()
263 if (rdev->pm.dpm.dyn_state.cac_leakage_table.count != in ci_populate_bapm_vddc_vid_sidd()
264 rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count) in ci_populate_bapm_vddc_vid_sidd()
267 for (i = 0; i < rdev->pm.dpm.dyn_state.cac_leakage_table.count; i++) { in ci_populate_bapm_vddc_vid_sidd()
269 lo_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1); in ci_populate_bapm_vddc_vid_sidd()
270 hi_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2); in ci_populate_bapm_vddc_vid_sidd()
271 hi2_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc3); in ci_populate_bapm_vddc_vid_sidd()
273 lo_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc); in ci_populate_bapm_vddc_vid_sidd()
274 hi_vid[i] = ci_convert_to_vid((u16)rdev->pm.dpm.dyn_state in ci_populate_bapm_vddc_vid_sidd()
[all...] |
| H A D | btc_dpm.c | 1229 return btc_find_valid_clock(&rdev->pm.dpm.dyn_state.valid_mclk_values, in btc_get_valid_mclk()
1236 return btc_find_valid_clock(&rdev->pm.dpm.dyn_state.valid_sclk_values, in btc_get_valid_sclk()
1279 if (((pl->mclk + (pl->sclk - 1)) / pl->sclk) > rdev->pm.dpm.dyn_state.mclk_sclk_ratio) in btc_adjust_clock_combinations()
1283 (rdev->pm.dpm.dyn_state.mclk_sclk_ratio - 1)) / in btc_adjust_clock_combinations()
1284 rdev->pm.dpm.dyn_state.mclk_sclk_ratio); in btc_adjust_clock_combinations()
1286 if ((pl->sclk - pl->mclk) > rdev->pm.dpm.dyn_state.sclk_mclk_delta) in btc_adjust_clock_combinations()
1290 rdev->pm.dpm.dyn_state.sclk_mclk_delta); in btc_adjust_clock_combinations()
1317 if ((*vddc - *vddci) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) { in btc_apply_voltage_delta_rules()
1319 (*vddc - rdev->pm.dpm.dyn_state.vddc_vddci_delta)); in btc_apply_voltage_delta_rules()
1323 if ((*vddci - *vddc) > rdev->pm.dpm.dyn_state in btc_apply_voltage_delta_rules()
[all...] |
| H A D | kv_dpm.c | 399 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid2_to_vid7()
421 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid7_to_vid2()
562 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_program_bootup_state()
664 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_populate_uvd_table()
737 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in kv_populate_vce_table()
798 &rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; in kv_populate_samu_table()
864 &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; in kv_populate_acp_table()
923 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_calculate_dfs_bypass_settings()
1248 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_update_uvd_dpm()
1284 &rdev->pm.dpm.dyn_state in kv_get_vce_boot_level()
[all...] |
| H A D | si_dpm.c | 2144 struct radeon_ppm_table *ppm = rdev->pm.dpm.dyn_state.ppm_table; in si_populate_smc_tdp_limits()
2517 &rdev->pm.dpm.dyn_state.cac_leakage_table; in si_get_cac_std_voltage_max_min()
2920 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in si_get_vce_clock_voltage()
3007 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in si_apply_state_adjust_rules()
3009 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in si_apply_state_adjust_rules()
3029 btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, in si_apply_state_adjust_rules()
3031 btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in si_apply_state_adjust_rules()
3033 btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in si_apply_state_adjust_rules()
3135 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, in si_apply_state_adjust_rules()
3138 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state in si_apply_state_adjust_rules()
[all...] |
| H A D | ni_dpm.c | 802 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ni_apply_state_adjust_rules()
804 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ni_apply_state_adjust_rules()
873 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, in ni_apply_state_adjust_rules()
876 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in ni_apply_state_adjust_rules()
879 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in ni_apply_state_adjust_rules()
882 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk, in ni_apply_state_adjust_rules()
896 if (ps->performance_levels[i].vddc > rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc) in ni_apply_state_adjust_rules()
899 if (ps->performance_levels[i].vddc < rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2) in ni_apply_state_adjust_rules()
1012 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk); in ni_patch_dependency_tables_based_on_leakage()
1015 &rdev->pm.dpm.dyn_state in ni_patch_dependency_tables_based_on_leakage()
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/ |
| H A D | amdgpu_dpm.c | 339 ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk, in amdgpu_parse_extended_power_table()
350 ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in amdgpu_parse_extended_power_table()
361 ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in amdgpu_parse_extended_power_table()
372 ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.mvdd_dependency_on_mclk, in amdgpu_parse_extended_power_table()
385 adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk = in amdgpu_parse_extended_power_table()
388 adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk = in amdgpu_parse_extended_power_table()
391 adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc = in amdgpu_parse_extended_power_table()
393 adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddci = in amdgpu_parse_extended_power_table()
404 adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries = in amdgpu_parse_extended_power_table()
408 if (!adev->pm.dpm.dyn_state in amdgpu_parse_extended_power_table()
726 struct amdgpu_dpm_dynamic_state *dyn_state = &adev->pm.dpm.dyn_state; amdgpu_free_extended_power_table() local
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | processpptables.c | 1340 hwmgr->dyn_state.vddc_dependency_on_sclk = NULL; in init_clock_voltage_dependency()
1341 hwmgr->dyn_state.vddci_dependency_on_mclk = NULL; in init_clock_voltage_dependency()
1342 hwmgr->dyn_state.vddc_dependency_on_mclk = NULL; in init_clock_voltage_dependency()
1343 hwmgr->dyn_state.vddc_dep_on_dal_pwrl = NULL; in init_clock_voltage_dependency()
1344 hwmgr->dyn_state.mvdd_dependency_on_mclk = NULL; in init_clock_voltage_dependency()
1345 hwmgr->dyn_state.vce_clock_voltage_dependency_table = NULL; in init_clock_voltage_dependency()
1346 hwmgr->dyn_state.uvd_clock_voltage_dependency_table = NULL; in init_clock_voltage_dependency()
1347 hwmgr->dyn_state.samu_clock_voltage_dependency_table = NULL; in init_clock_voltage_dependency()
1348 hwmgr->dyn_state.acp_clock_voltage_dependency_table = NULL; in init_clock_voltage_dependency()
1349 hwmgr->dyn_state in init_clock_voltage_dependency()
[all...] |
| H A D | smu8_hwmgr.c | 73 hwmgr->dyn_state.vce_clock_voltage_dependency_table; in smu8_get_eclk_level()
104 hwmgr->dyn_state.vddc_dependency_on_sclk; in smu8_get_sclk_level()
134 hwmgr->dyn_state.uvd_clock_voltage_dependency_table; in smu8_get_uvd_level()
262 hwmgr->dyn_state.vddc_dependency_on_sclk; in smu8_construct_max_power_limits_table()
304 hwmgr->dyn_state.vddc_dep_on_dal_pwrl = table_clk_vlt; in smu8_init_dynamic_state_adjustment_rule_settings()
405 &hwmgr->dyn_state.max_clock_voltage_on_ac); in smu8_get_system_info_data()
444 hwmgr->dyn_state.vddc_dependency_on_sclk; in smu8_upload_pptable_to_smu()
446 hwmgr->dyn_state.vdd_gfx_dependency_on_sclk; in smu8_upload_pptable_to_smu()
448 hwmgr->dyn_state.acp_clock_voltage_dependency_table; in smu8_upload_pptable_to_smu()
450 hwmgr->dyn_state in smu8_upload_pptable_to_smu()
[all...] |
| H A D | smu7_hwmgr.c | 275 hwmgr->dyn_state.mvdd_dependency_on_mclk); in smu7_construct_voltage_tables()
295 hwmgr->dyn_state.vddci_dependency_on_mclk); in smu7_construct_voltage_tables()
320 hwmgr->dyn_state.vddc_dependency_on_mclk); in smu7_construct_voltage_tables()
723 hwmgr->dyn_state.vddc_dependency_on_sclk; in smu7_setup_dpm_tables_v0()
725 hwmgr->dyn_state.vddc_dependency_on_mclk; in smu7_setup_dpm_tables_v0()
727 hwmgr->dyn_state.cac_leakage_table; in smu7_setup_dpm_tables_v0()
777 allowed_vdd_mclk_table = hwmgr->dyn_state.vddci_dependency_on_mclk; in smu7_setup_dpm_tables_v0()
788 allowed_vdd_mclk_table = hwmgr->dyn_state.mvdd_dependency_on_mclk; in smu7_setup_dpm_tables_v0()
1928 hwmgr->dyn_state.max_clock_voltage_on_dc.vddc = in smu7_patch_clock_voltage_limits_with_vddc_leakage()
2192 hwmgr->dyn_state in smu7_set_private_data_based_on_pptable_v1()
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | processpptables.c | 1324 hwmgr->dyn_state.vddc_dependency_on_sclk = NULL; in init_clock_voltage_dependency()
1325 hwmgr->dyn_state.vddci_dependency_on_mclk = NULL; in init_clock_voltage_dependency()
1326 hwmgr->dyn_state.vddc_dependency_on_mclk = NULL; in init_clock_voltage_dependency()
1327 hwmgr->dyn_state.vddc_dep_on_dal_pwrl = NULL; in init_clock_voltage_dependency()
1328 hwmgr->dyn_state.mvdd_dependency_on_mclk = NULL; in init_clock_voltage_dependency()
1329 hwmgr->dyn_state.vce_clock_voltage_dependency_table = NULL; in init_clock_voltage_dependency()
1330 hwmgr->dyn_state.uvd_clock_voltage_dependency_table = NULL; in init_clock_voltage_dependency()
1331 hwmgr->dyn_state.samu_clock_voltage_dependency_table = NULL; in init_clock_voltage_dependency()
1332 hwmgr->dyn_state.acp_clock_voltage_dependency_table = NULL; in init_clock_voltage_dependency()
1333 hwmgr->dyn_state in init_clock_voltage_dependency()
[all...] |
| H A D | smu8_hwmgr.c | 73 hwmgr->dyn_state.vce_clock_voltage_dependency_table; in smu8_get_eclk_level()
104 hwmgr->dyn_state.vddc_dependency_on_sclk; in smu8_get_sclk_level()
134 hwmgr->dyn_state.uvd_clock_voltage_dependency_table; in smu8_get_uvd_level()
262 hwmgr->dyn_state.vddc_dependency_on_sclk; in smu8_construct_max_power_limits_table()
304 hwmgr->dyn_state.vddc_dep_on_dal_pwrl = table_clk_vlt; in smu8_init_dynamic_state_adjustment_rule_settings()
405 &hwmgr->dyn_state.max_clock_voltage_on_ac); in smu8_get_system_info_data()
444 hwmgr->dyn_state.vddc_dependency_on_sclk; in smu8_upload_pptable_to_smu()
446 hwmgr->dyn_state.vdd_gfx_dependency_on_sclk; in smu8_upload_pptable_to_smu()
448 hwmgr->dyn_state.acp_clock_voltage_dependency_table; in smu8_upload_pptable_to_smu()
450 hwmgr->dyn_state in smu8_upload_pptable_to_smu()
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| H A D | iceland_smumgr.c | 325 tdc_limit = (uint16_t)(hwmgr->dyn_state.cac_dtp_table->usTDC * 256); in iceland_populate_tdc_limit()
376 struct phm_cac_tdp_table *cac_table = hwmgr->dyn_state.cac_dtp_table; in iceland_populate_bapm_vddc_base_leakage_sidd()
396 PP_ASSERT_WITH_CODE(NULL != hwmgr->dyn_state.cac_leakage_table, in iceland_populate_bapm_vddc_vid_sidd()
398 PP_ASSERT_WITH_CODE(hwmgr->dyn_state.cac_leakage_table->count <= 8, in iceland_populate_bapm_vddc_vid_sidd()
400 PP_ASSERT_WITH_CODE(hwmgr->dyn_state.cac_leakage_table->count == hwmgr->dyn_state.vddc_dependency_on_sclk->count, in iceland_populate_bapm_vddc_vid_sidd()
404 for (i = 0; (uint32_t) i < hwmgr->dyn_state.cac_leakage_table->count; i++) { in iceland_populate_bapm_vddc_vid_sidd()
405 lo_vid[i] = convert_to_vid(hwmgr->dyn_state.cac_leakage_table->entries[i].Vddc1); in iceland_populate_bapm_vddc_vid_sidd()
406 hi_vid[i] = convert_to_vid(hwmgr->dyn_state.cac_leakage_table->entries[i].Vddc2); in iceland_populate_bapm_vddc_vid_sidd()
540 PP_ASSERT_WITH_CODE(NULL != hwmgr->dyn_state in iceland_get_std_voltage_value_sidd()
[all...] |
| H A D | ci_smumgr.c | 418 hwmgr->dyn_state.vddc_dependency_on_sclk, clock, in ci_populate_single_graphic_level()
430 hwmgr->dyn_state.vddc_phase_shed_limits_table, in ci_populate_single_graphic_level()
531 tdc_limit = (uint16_t)(hwmgr->dyn_state.cac_dtp_table->usTDC * 256); in ci_populate_tdc_limit()
584 PP_ASSERT_WITH_CODE(NULL != hwmgr->dyn_state.cac_leakage_table, in ci_populate_bapm_vddc_vid_sidd()
586 PP_ASSERT_WITH_CODE(hwmgr->dyn_state.cac_leakage_table->count <= 8, in ci_populate_bapm_vddc_vid_sidd()
588 PP_ASSERT_WITH_CODE(hwmgr->dyn_state.cac_leakage_table->count == hwmgr->dyn_state.vddc_dependency_on_sclk->count, in ci_populate_bapm_vddc_vid_sidd()
591 for (i = 0; (uint32_t) i < hwmgr->dyn_state.cac_leakage_table->count; i++) { in ci_populate_bapm_vddc_vid_sidd()
593 lo_vid[i] = convert_to_vid(hwmgr->dyn_state.cac_leakage_table->entries[i].Vddc1); in ci_populate_bapm_vddc_vid_sidd()
594 hi_vid[i] = convert_to_vid(hwmgr->dyn_state in ci_populate_bapm_vddc_vid_sidd()
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| H A D | iceland_smumgr.c | 325 tdc_limit = (uint16_t)(hwmgr->dyn_state.cac_dtp_table->usTDC * 256); in iceland_populate_tdc_limit()
376 struct phm_cac_tdp_table *cac_table = hwmgr->dyn_state.cac_dtp_table; in iceland_populate_bapm_vddc_base_leakage_sidd()
396 PP_ASSERT_WITH_CODE(NULL != hwmgr->dyn_state.cac_leakage_table, in iceland_populate_bapm_vddc_vid_sidd()
398 PP_ASSERT_WITH_CODE(hwmgr->dyn_state.cac_leakage_table->count <= 8, in iceland_populate_bapm_vddc_vid_sidd()
400 PP_ASSERT_WITH_CODE(hwmgr->dyn_state.cac_leakage_table->count == hwmgr->dyn_state.vddc_dependency_on_sclk->count, in iceland_populate_bapm_vddc_vid_sidd()
404 for (i = 0; (uint32_t) i < hwmgr->dyn_state.cac_leakage_table->count; i++) { in iceland_populate_bapm_vddc_vid_sidd()
405 lo_vid[i] = convert_to_vid(hwmgr->dyn_state.cac_leakage_table->entries[i].Vddc1); in iceland_populate_bapm_vddc_vid_sidd()
406 hi_vid[i] = convert_to_vid(hwmgr->dyn_state.cac_leakage_table->entries[i].Vddc2); in iceland_populate_bapm_vddc_vid_sidd()
540 PP_ASSERT_WITH_CODE(NULL != hwmgr->dyn_state in iceland_get_std_voltage_value_sidd()
[all...] |
| H A D | ci_smumgr.c | 419 hwmgr->dyn_state.vddc_dependency_on_sclk, clock, in ci_populate_single_graphic_level()
431 hwmgr->dyn_state.vddc_phase_shed_limits_table, in ci_populate_single_graphic_level()
532 tdc_limit = (uint16_t)(hwmgr->dyn_state.cac_dtp_table->usTDC * 256); in ci_populate_tdc_limit()
585 PP_ASSERT_WITH_CODE(NULL != hwmgr->dyn_state.cac_leakage_table, in ci_populate_bapm_vddc_vid_sidd()
587 PP_ASSERT_WITH_CODE(hwmgr->dyn_state.cac_leakage_table->count <= 8, in ci_populate_bapm_vddc_vid_sidd()
589 PP_ASSERT_WITH_CODE(hwmgr->dyn_state.cac_leakage_table->count == hwmgr->dyn_state.vddc_dependency_on_sclk->count, in ci_populate_bapm_vddc_vid_sidd()
592 for (i = 0; (uint32_t) i < hwmgr->dyn_state.cac_leakage_table->count; i++) { in ci_populate_bapm_vddc_vid_sidd()
594 lo_vid[i] = convert_to_vid(hwmgr->dyn_state.cac_leakage_table->entries[i].Vddc1); in ci_populate_bapm_vddc_vid_sidd()
595 hi_vid[i] = convert_to_vid(hwmgr->dyn_state in ci_populate_bapm_vddc_vid_sidd()
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/ |
| H A D | si_dpm.c | 2236 struct amdgpu_ppm_table *ppm = adev->pm.dpm.dyn_state.ppm_table; in si_populate_smc_tdp_limits()
2617 &adev->pm.dpm.dyn_state.cac_leakage_table; in si_get_cac_std_voltage_max_min()
3021 &adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in si_get_vce_clock_voltage()
3219 return btc_find_valid_clock(&adev->pm.dpm.dyn_state.valid_mclk_values, in btc_get_valid_mclk()
3226 return btc_find_valid_clock(&adev->pm.dpm.dyn_state.valid_sclk_values, in btc_get_valid_sclk()
3279 if (((pl->mclk + (pl->sclk - 1)) / pl->sclk) > adev->pm.dpm.dyn_state.mclk_sclk_ratio) in btc_adjust_clock_combinations()
3283 (adev->pm.dpm.dyn_state.mclk_sclk_ratio - 1)) / in btc_adjust_clock_combinations()
3284 adev->pm.dpm.dyn_state.mclk_sclk_ratio); in btc_adjust_clock_combinations()
3286 if ((pl->sclk - pl->mclk) > adev->pm.dpm.dyn_state.sclk_mclk_delta) in btc_adjust_clock_combinations()
3290 adev->pm.dpm.dyn_state in btc_adjust_clock_combinations()
[all...] |