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/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
H A Dintel_dsb.c45 * ins_start_offset will help to store start dword of the dsb
85 static bool assert_dsb_has_room(struct intel_dsb *dsb) in assert_dsb_has_room() argument
87 struct intel_crtc *crtc = dsb->crtc; in assert_dsb_has_room()
91 return !drm_WARN(&i915->drm, dsb->free_pos > dsb->size - 2, in assert_dsb_has_room()
93 crtc->base.base.id, crtc->base.name, dsb->id); in assert_dsb_has_room()
102 static void intel_dsb_emit(struct intel_dsb *dsb, u32 ldw, u32 udw) in intel_dsb_emit() argument
104 u32 *buf = dsb->cmd_buf; in intel_dsb_emit()
106 if (!assert_dsb_has_room(dsb)) in intel_dsb_emit()
110 dsb in intel_dsb_emit()
118 intel_dsb_prev_ins_is_write(struct intel_dsb *dsb, u32 opcode, i915_reg_t reg) intel_dsb_prev_ins_is_write() argument
130 intel_dsb_prev_ins_is_mmio_write(struct intel_dsb *dsb, i915_reg_t reg) intel_dsb_prev_ins_is_mmio_write() argument
135 intel_dsb_prev_ins_is_indexed_write(struct intel_dsb *dsb, i915_reg_t reg) intel_dsb_prev_ins_is_indexed_write() argument
149 intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val) intel_dsb_reg_write() argument
203 intel_dsb_align_tail(struct intel_dsb *dsb) intel_dsb_align_tail() argument
217 intel_dsb_finish(struct intel_dsb *dsb) intel_dsb_finish() argument
229 intel_dsb_commit(struct intel_dsb *dsb, bool wait_for_vblank) intel_dsb_commit() argument
255 intel_dsb_wait(struct intel_dsb *dsb) intel_dsb_wait() argument
289 struct intel_dsb *dsb; intel_dsb_prepare() local
352 intel_dsb_cleanup(struct intel_dsb *dsb) intel_dsb_cleanup() argument
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H A Dintel_dsb.h18 void intel_dsb_finish(struct intel_dsb *dsb);
19 void intel_dsb_cleanup(struct intel_dsb *dsb);
20 void intel_dsb_reg_write(struct intel_dsb *dsb,
22 void intel_dsb_commit(struct intel_dsb *dsb,
24 void intel_dsb_wait(struct intel_dsb *dsb);
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
H A Dintel_dsb.c95 struct intel_dsb *dsb = crtc_state->dsb; in intel_dsb_indexed_reg_write() local
101 if (!dsb) { in intel_dsb_indexed_reg_write()
105 buf = dsb->cmd_buf; in intel_dsb_indexed_reg_write()
106 if (drm_WARN_ON(&dev_priv->drm, dsb->free_pos >= DSB_BUF_SIZE)) { in intel_dsb_indexed_reg_write()
122 * As every instruction is 8 byte aligned the index of dsb instruction in intel_dsb_indexed_reg_write()
127 reg_val = buf[dsb->ins_start_offset + 1] & DSB_REG_VALUE_MASK; in intel_dsb_indexed_reg_write()
130 dsb->free_pos = ALIGN(dsb->free_pos, 2); in intel_dsb_indexed_reg_write()
132 dsb in intel_dsb_indexed_reg_write()
174 struct intel_dsb *dsb; intel_dsb_reg_write() local
205 struct intel_dsb *dsb = crtc_state->dsb; intel_dsb_commit() local
264 struct intel_dsb *dsb; intel_dsb_prepare() local
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/kernel/linux/linux-6.6/arch/arm64/kvm/hyp/vhe/
H A Dtlb.c87 dsb(ishst); in __kvm_tlb_flush_vmid_ipa()
106 dsb(ish); in __kvm_tlb_flush_vmid_ipa()
108 dsb(ish); in __kvm_tlb_flush_vmid_ipa()
119 dsb(nshst); in __kvm_tlb_flush_vmid_ipa_nsh()
138 dsb(nsh); in __kvm_tlb_flush_vmid_ipa_nsh()
140 dsb(nsh); in __kvm_tlb_flush_vmid_ipa_nsh()
159 dsb(ishst); in __kvm_tlb_flush_vmid_range()
166 dsb(ish); in __kvm_tlb_flush_vmid_range()
168 dsb(ish); in __kvm_tlb_flush_vmid_range()
178 dsb(ishs in __kvm_tlb_flush_vmid()
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/kernel/linux/linux-6.6/arch/arm64/kvm/hyp/nvhe/
H A Dtlb.c25 * CPUs, for which a dsb(DOMAIN-st) is what we need, DOMAIN in __tlb_switch_to_guest()
31 * registers out of context, for which dsb(nsh) is enough in __tlb_switch_to_guest()
33 * The composition of these two barriers is a dsb(DOMAIN), and in __tlb_switch_to_guest()
39 dsb(nsh); in __tlb_switch_to_guest()
41 dsb(ish); in __tlb_switch_to_guest()
103 dsb(ish); in __kvm_tlb_flush_vmid_ipa()
105 dsb(ish); in __kvm_tlb_flush_vmid_ipa()
155 dsb(nsh); in __kvm_tlb_flush_vmid_ipa_nsh()
157 dsb(nsh); in __kvm_tlb_flush_vmid_ipa_nsh()
203 dsb(is in __kvm_tlb_flush_vmid_range()
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/kernel/linux/linux-6.6/arch/arm64/include/asm/
H A Dtlbflush.h35 "dsb ish\n tlbi " #op, \
43 "dsb ish\n tlbi " #op ", %0", \
233 dsb(nshst); in local_flush_tlb_all()
235 dsb(nsh); in local_flush_tlb_all()
241 dsb(ishst); in flush_tlb_all()
243 dsb(ish); in flush_tlb_all()
251 dsb(ishst); in flush_tlb_mm()
255 dsb(ish); in flush_tlb_mm()
264 dsb(ishst); in __flush_tlb_page_nosync()
282 dsb(is in flush_tlb_page()
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/kernel/linux/linux-5.10/fs/erofs/
H A Dsuper.c54 struct erofs_super_block *dsb; in erofs_superblock_csum_verify() local
57 dsb = kmemdup(sbdata + EROFS_SUPER_OFFSET, in erofs_superblock_csum_verify()
59 if (!dsb) in erofs_superblock_csum_verify()
62 expected_crc = le32_to_cpu(dsb->checksum); in erofs_superblock_csum_verify()
63 dsb->checksum = 0; in erofs_superblock_csum_verify()
65 crc = crc32c(~0, dsb, EROFS_BLKSIZ - EROFS_SUPER_OFFSET); in erofs_superblock_csum_verify()
66 kfree(dsb); in erofs_superblock_csum_verify()
109 struct erofs_super_block *dsb) in check_layout_compatibility()
111 const unsigned int feature = le32_to_cpu(dsb->feature_incompat); in check_layout_compatibility()
129 struct erofs_super_block *dsb; in erofs_read_superblock() local
108 check_layout_compatibility(struct super_block *sb, struct erofs_super_block *dsb) check_layout_compatibility() argument
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/kernel/linux/linux-5.10/arch/arm64/include/asm/
H A Dtlbflush.h34 "dsb ish\n tlbi " #op, \
42 "dsb ish\n tlbi " #op ", %0", \
232 dsb(nshst); in local_flush_tlb_all()
234 dsb(nsh); in local_flush_tlb_all()
240 dsb(ishst); in flush_tlb_all()
242 dsb(ish); in flush_tlb_all()
250 dsb(ishst); in flush_tlb_mm()
254 dsb(ish); in flush_tlb_mm()
262 dsb(ishst); in flush_tlb_page_nosync()
272 dsb(is in flush_tlb_page()
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H A Dbarrier.h23 #define dsb(opt) asm volatile("dsb " #opt : : : "memory") macro
28 #define spec_bar() asm volatile(ALTERNATIVE("dsb nsh\nisb\n", \
38 dsb(sy); \
44 #define mb() dsb(sy)
45 #define rmb() dsb(ld)
46 #define wmb() dsb(st)
/kernel/linux/linux-6.6/fs/erofs/
H A Dsuper.c54 struct erofs_super_block *dsb; in erofs_superblock_csum_verify() local
60 dsb = kmemdup(sbdata + EROFS_SUPER_OFFSET, len, GFP_KERNEL); in erofs_superblock_csum_verify()
61 if (!dsb) in erofs_superblock_csum_verify()
64 expected_crc = le32_to_cpu(dsb->checksum); in erofs_superblock_csum_verify()
65 dsb->checksum = 0; in erofs_superblock_csum_verify()
67 crc = crc32c(~0, dsb, len); in erofs_superblock_csum_verify()
68 kfree(dsb); in erofs_superblock_csum_verify()
109 struct erofs_super_block *dsb) in check_layout_compatibility()
111 const unsigned int feature = le32_to_cpu(dsb->feature_incompat); in check_layout_compatibility()
161 struct erofs_super_block *dsb) in z_erofs_parse_cfgs()
108 check_layout_compatibility(struct super_block *sb, struct erofs_super_block *dsb) check_layout_compatibility() argument
160 z_erofs_parse_cfgs(struct super_block *sb, struct erofs_super_block *dsb) z_erofs_parse_cfgs() argument
217 erofs_scan_devices(struct super_block *sb, struct erofs_super_block *dsb) erofs_scan_devices() argument
283 struct erofs_super_block *dsb; erofs_read_superblock() local
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H A Dcompress.h24 int (*config)(struct super_block *sb, struct erofs_super_block *dsb,
98 struct erofs_super_block *dsb, void *data, int size);
100 struct erofs_super_block *dsb, void *data, int size);
/kernel/linux/linux-5.10/arch/arm64/kvm/hyp/vhe/
H A Dtlb.c87 dsb(ishst); in __kvm_tlb_flush_vmid_ipa()
106 dsb(ish); in __kvm_tlb_flush_vmid_ipa()
108 dsb(ish); in __kvm_tlb_flush_vmid_ipa()
118 dsb(ishst); in __kvm_tlb_flush_vmid()
124 dsb(ish); in __kvm_tlb_flush_vmid()
139 dsb(nsh); in __kvm_flush_cpu_context()
147 dsb(ishst); in __kvm_flush_vm_context()
162 dsb(ish); in __kvm_flush_vm_context()
/kernel/linux/linux-5.10/arch/arm64/kvm/hyp/nvhe/
H A Dtlb.c61 dsb(ishst); in __kvm_tlb_flush_vmid_ipa()
80 dsb(ish); in __kvm_tlb_flush_vmid_ipa()
82 dsb(ish); in __kvm_tlb_flush_vmid_ipa()
114 dsb(ishst); in __kvm_tlb_flush_vmid()
120 dsb(ish); in __kvm_tlb_flush_vmid()
135 dsb(nsh); in __kvm_flush_cpu_context()
143 dsb(ishst); in __kvm_flush_vm_context()
158 dsb(ish); in __kvm_flush_vm_context()
/kernel/linux/linux-5.10/arch/arm/include/asm/
H A Dbarrier.h20 #define dsb(option) __asm__ __volatile__ ("dsb " #option : : : "memory") macro
31 #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ macro
38 #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ macro
43 #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ macro
58 #define __arm_heavy_mb(x...) do { dsb(x); arm_heavy_mb(); } while (0)
60 #define __arm_heavy_mb(x...) dsb(x)
65 #define rmb() dsb()
H A Dtlbflush.h339 dsb(nshst); in local_flush_tlb_all()
345 dsb(nsh); in local_flush_tlb_all()
356 dsb(ishst); in __flush_tlb_all()
362 dsb(ish); in __flush_tlb_all()
392 dsb(nshst); in local_flush_tlb_mm()
398 dsb(nsh); in local_flush_tlb_mm()
406 dsb(ishst); in __flush_tlb_mm()
416 dsb(ish); in __flush_tlb_mm()
449 dsb(nshst); in local_flush_tlb_page()
455 dsb(ns in local_flush_tlb_page()
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/kernel/linux/linux-6.6/arch/arm/include/asm/
H A Dbarrier.h20 #define dsb(option) __asm__ __volatile__ ("dsb " #option : : : "memory") macro
31 #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ macro
38 #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ macro
43 #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ macro
58 #define __arm_heavy_mb(x...) do { dsb(x); arm_heavy_mb(); } while (0)
60 #define __arm_heavy_mb(x...) dsb(x)
65 #define rmb() dsb()
H A Dtlbflush.h332 dsb(nshst); in local_flush_tlb_all()
338 dsb(nsh); in local_flush_tlb_all()
349 dsb(ishst); in __flush_tlb_all()
355 dsb(ish); in __flush_tlb_all()
385 dsb(nshst); in local_flush_tlb_mm()
391 dsb(nsh); in local_flush_tlb_mm()
399 dsb(ishst); in __flush_tlb_mm()
409 dsb(ish); in __flush_tlb_mm()
442 dsb(nshst); in local_flush_tlb_page()
448 dsb(ns in local_flush_tlb_page()
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/kernel/linux/linux-5.10/arch/nds32/include/asm/
H A Dassembler.h9 dsb
14 dsb
20 dsb
27 dsb
/kernel/linux/linux-5.10/arch/arm/mach-omap2/
H A Dsleep43xx.S99 dsb
114 dsb
116 dsb
138 dsb
140 dsb
262 dsb
388 dsb
390 dsb
394 dsb
396 dsb
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/kernel/linux/linux-6.6/arch/arm/mach-omap2/
H A Dsleep43xx.S99 dsb
114 dsb
116 dsb
138 dsb
140 dsb
262 dsb
388 dsb
390 dsb
394 dsb
396 dsb
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/kernel/linux/linux-5.10/arch/arm/mm/
H A Dcache-xsc3l2.c55 dsb(); in xsc3_l2_inv_all()
127 dsb(); in xsc3_l2_inv_range()
145 dsb(); in xsc3_l2_clean_range()
165 dsb(); in xsc3_l2_flush_all()
189 dsb(); in xsc3_l2_flush_range()
H A Dcache-v7.S69 dsb st
173 dsb
179 dsb st
287 ALT_SMP(W(dsb))
295 dsb ishst
312 dsb ishst
322 dsb
345 ALT_SMP(W(dsb))
353 dsb st
373 ALT_SMP(W(dsb))
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H A Dpv-fixup-asm.S25 dsb
72 dsb
77 dsb
81 dsb
/kernel/linux/linux-6.6/arch/arm/mm/
H A Dcache-xsc3l2.c55 dsb(); in xsc3_l2_inv_all()
127 dsb(); in xsc3_l2_inv_range()
145 dsb(); in xsc3_l2_clean_range()
165 dsb(); in xsc3_l2_flush_all()
189 dsb(); in xsc3_l2_flush_range()
H A Dcache-v7.S70 3: dsb st
174 dsb
180 dsb st
284 ALT_SMP(W(dsb))
292 dsb ishst
309 dsb ishst
319 dsb
342 ALT_SMP(W(dsb))
350 dsb st
370 ALT_SMP(W(dsb))
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