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Searched refs:cfgchip (Results 1 - 25 of 27) sorted by relevance

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/kernel/linux/linux-5.10/include/linux/clk/
H A Ddavinci.h17 int da830_pll_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
20 int da850_pll0_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
23 int dm355_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
27 int dm365_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
28 int dm365_pll2_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
32 int dm644x_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
36 int dm646x_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
/kernel/linux/linux-5.10/drivers/clk/davinci/
H A Dpll-da850.c16 #include <linux/mfd/da8xx-cfgchip.h>
89 int da850_pll0_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) in da850_pll0_init() argument
93 davinci_pll_clk_register(dev, &da850_pll0_info, "ref_clk", base, cfgchip); in da850_pll0_init()
145 struct regmap *cfgchip; in of_da850_pll0_init() local
153 cfgchip = syscon_regmap_lookup_by_compatible("ti,da830-cfgchip"); in of_da850_pll0_init()
157 da850_pll0_sysclk_info, 7, base, cfgchip); in of_da850_pll0_init()
198 int da850_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) in da850_pll1_init() argument
202 davinci_pll_clk_register(dev, &da850_pll1_info, "oscin", base, cfgchip); in da850_pll1_init()
223 int of_da850_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) in of_da850_pll1_init() argument
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H A Dpll.h99 struct regmap *cfgchip);
121 struct regmap *cfgchip);
126 int da850_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
128 int of_da850_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
131 int dm355_pll2_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
134 int dm644x_pll2_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
137 int dm646x_pll2_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
H A Dpll-dm355.c31 int dm355_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) in dm355_pll1_init() argument
35 davinci_pll_clk_register(dev, &dm355_pll1_info, "ref_clk", base, cfgchip); in dm355_pll1_init()
68 int dm355_pll2_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) in dm355_pll2_init() argument
70 davinci_pll_clk_register(dev, &dm355_pll2_info, "oscin", base, cfgchip); in dm355_pll2_init()
H A Dpll-dm644x.c31 int dm644x_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) in dm644x_pll1_init() argument
35 davinci_pll_clk_register(dev, &dm644x_pll1_info, "ref_clk", base, cfgchip); in dm644x_pll1_init()
70 int dm644x_pll2_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) in dm644x_pll2_init() argument
72 davinci_pll_clk_register(dev, &dm644x_pll2_info, "oscin", base, cfgchip); in dm644x_pll2_init()
H A Dpll-dm646x.c33 int dm646x_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) in dm646x_pll1_init() argument
37 davinci_pll_clk_register(dev, &dm646x_pll1_info, "ref_clk", base, cfgchip); in dm646x_pll1_init()
78 int dm646x_pll2_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) in dm646x_pll2_init() argument
80 davinci_pll_clk_register(dev, &dm646x_pll2_info, "oscin", base, cfgchip); in dm646x_pll2_init()
H A Dda8xx-cfgchip.c12 #include <linux/mfd/da8xx-cfgchip.h>
16 #include <linux/platform_data/clk-da8xx-cfgchip.h>
27 u32 cfgchip; member
118 gate->reg = info->cfgchip; in da8xx_cfgchip_gate_clk_register()
130 .cfgchip = CFGCHIP(1),
152 .cfgchip = CFGCHIP(3),
199 u32 cfgchip; member
258 mux->reg = info->cfgchip; in da8xx_cfgchip_mux_clk_register()
272 .cfgchip = CFGCHIP(3),
294 .cfgchip
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H A Dpll-dm365.c60 int dm365_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) in dm365_pll1_init() argument
64 davinci_pll_clk_register(dev, &dm365_pll1_info, "ref_clk", base, cfgchip); in dm365_pll1_init()
123 int dm365_pll2_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) in dm365_pll2_init() argument
127 davinci_pll_clk_register(dev, &dm365_pll2_info, "oscin", base, cfgchip); in dm365_pll2_init()
H A Dpll-da830.c40 int da830_pll_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) in da830_pll_init() argument
44 davinci_pll_clk_register(dev, &da830_pll_info, "ref_clk", base, cfgchip); in da830_pll_init()
H A Dpll.c353 * @cfgchip: CFGCHIP syscon regmap for info->unlock_reg or NULL
370 struct regmap *cfgchip) in davinci_pll_clk_register()
430 if (IS_ERR_OR_NULL(cfgchip)) in davinci_pll_clk_register()
432 PTR_ERR(cfgchip)); in davinci_pll_clk_register()
434 regmap_write_bits(cfgchip, info->unlock_reg, in davinci_pll_clk_register()
751 struct regmap *cfgchip) in of_davinci_pll_init()
762 clk = davinci_pll_clk_register(dev, info, parent_name, base, cfgchip); in of_davinci_pll_init()
859 pdata->cfgchip = in davinci_pll_get_pdata()
860 syscon_regmap_lookup_by_compatible("ti,da830-cfgchip"); in davinci_pll_get_pdata()
905 struct regmap *cfgchip);
366 davinci_pll_clk_register(struct device *dev, const struct davinci_pll_clk_info *info, const char *parent_name, void __iomem *base, struct regmap *cfgchip) davinci_pll_clk_register() argument
745 of_davinci_pll_init(struct device *dev, struct device_node *node, const struct davinci_pll_clk_info *info, const struct davinci_pll_obsclk_info *obsclk_info, const struct davinci_pll_sysclk_info **div_info, u8 max_sysclk_id, void __iomem *base, struct regmap *cfgchip) of_davinci_pll_init() argument
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/kernel/linux/linux-6.6/drivers/clk/davinci/
H A Dpll-da850.c16 #include <linux/mfd/da8xx-cfgchip.h>
89 int da850_pll0_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) in da850_pll0_init() argument
93 davinci_pll_clk_register(dev, &da850_pll0_info, "ref_clk", base, cfgchip); in da850_pll0_init()
145 struct regmap *cfgchip; in of_da850_pll0_init() local
153 cfgchip = syscon_regmap_lookup_by_compatible("ti,da830-cfgchip"); in of_da850_pll0_init()
157 da850_pll0_sysclk_info, 7, base, cfgchip); in of_da850_pll0_init()
198 int da850_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) in da850_pll1_init() argument
202 davinci_pll_clk_register(dev, &da850_pll1_info, "oscin", base, cfgchip); in da850_pll1_init()
223 int of_da850_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) in of_da850_pll1_init() argument
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H A Dpll.h99 struct regmap *cfgchip);
121 struct regmap *cfgchip);
125 int da850_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
127 int of_da850_pll1_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
H A Dda8xx-cfgchip.c12 #include <linux/mfd/da8xx-cfgchip.h>
16 #include <linux/platform_data/clk-da8xx-cfgchip.h>
27 u32 cfgchip; member
118 gate->reg = info->cfgchip; in da8xx_cfgchip_gate_clk_register()
130 .cfgchip = CFGCHIP(1),
152 .cfgchip = CFGCHIP(3),
199 u32 cfgchip; member
259 mux->reg = info->cfgchip; in da8xx_cfgchip_mux_clk_register()
273 .cfgchip = CFGCHIP(3),
295 .cfgchip
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H A Dpll-da830.c40 int da830_pll_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) in da830_pll_init() argument
44 davinci_pll_clk_register(dev, &da830_pll_info, "ref_clk", base, cfgchip); in da830_pll_init()
H A Dpll.c353 * @cfgchip: CFGCHIP syscon regmap for info->unlock_reg or NULL
370 struct regmap *cfgchip) in davinci_pll_clk_register()
430 if (IS_ERR_OR_NULL(cfgchip)) in davinci_pll_clk_register()
432 PTR_ERR(cfgchip)); in davinci_pll_clk_register()
434 regmap_write_bits(cfgchip, info->unlock_reg, in davinci_pll_clk_register()
751 struct regmap *cfgchip) in of_davinci_pll_init()
762 clk = davinci_pll_clk_register(dev, info, parent_name, base, cfgchip); in of_davinci_pll_init()
859 pdata->cfgchip = in davinci_pll_get_pdata()
860 syscon_regmap_lookup_by_compatible("ti,da830-cfgchip"); in davinci_pll_get_pdata()
889 struct regmap *cfgchip);
366 davinci_pll_clk_register(struct device *dev, const struct davinci_pll_clk_info *info, const char *parent_name, void __iomem *base, struct regmap *cfgchip) davinci_pll_clk_register() argument
745 of_davinci_pll_init(struct device *dev, struct device_node *node, const struct davinci_pll_clk_info *info, const struct davinci_pll_obsclk_info *obsclk_info, const struct davinci_pll_sysclk_info **div_info, u8 max_sysclk_id, void __iomem *base, struct regmap *cfgchip) of_davinci_pll_init() argument
[all...]
/kernel/linux/linux-5.10/arch/arm/mach-davinci/
H A Dusb-da8xx.c9 #include <linux/mfd/da8xx-cfgchip.h>
12 #include <linux/platform_data/clk-da8xx-cfgchip.h>
49 da8xx_usb_phy_pdata.cfgchip = da8xx_get_cfgchip(); in da8xx_register_usb_phy()
143 pdata.cfgchip = da8xx_get_cfgchip(); in da8xx_register_usb_phy_clocks()
H A Dda850.c23 #include <linux/mfd/da8xx-cfgchip.h>
24 #include <linux/platform_data/clk-da8xx-cfgchip.h>
651 struct regmap *cfgchip; in da850_init_time() local
658 cfgchip = da8xx_get_cfgchip(); in da850_init_time()
660 da850_pll0_init(NULL, pll0, cfgchip); in da850_init_time()
756 da850_pll1_pdata.cfgchip = da8xx_get_cfgchip(); in da850_register_clocks()
759 da850_async1_pdata.cfgchip = da8xx_get_cfgchip(); in da850_register_clocks()
762 da850_async3_pdata.cfgchip = da8xx_get_cfgchip(); in da850_register_clocks()
769 da850_tbclksync_pdata.cfgchip = da8xx_get_cfgchip(); in da850_register_clocks()
/kernel/linux/linux-6.6/include/linux/clk/
H A Ddavinci.h17 int da830_pll_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
20 int da850_pll0_init(struct device *dev, void __iomem *base, struct regmap *cfgchip);
/kernel/linux/linux-5.10/include/linux/platform_data/
H A Dclk-da8xx-cfgchip.h3 * clk-da8xx-cfgchip - TI DaVinci DA8xx CFGCHIP clock driver
15 * @cfgchip: CFGCHIP syscon regmap
18 struct regmap *cfgchip; member
H A Dclk-davinci-pll.h15 * @cfgchip: CFGCHIP syscon regmap
18 struct regmap *cfgchip; member
H A Dphy-da8xx-usb.h15 * @cfgchip: CFGCHIP syscon regmap
18 struct regmap *cfgchip; member
/kernel/linux/linux-6.6/include/linux/platform_data/
H A Dclk-da8xx-cfgchip.h3 * clk-da8xx-cfgchip - TI DaVinci DA8xx CFGCHIP clock driver
15 * @cfgchip: CFGCHIP syscon regmap
18 struct regmap *cfgchip; member
H A Dclk-davinci-pll.h15 * @cfgchip: CFGCHIP syscon regmap
18 struct regmap *cfgchip; member
H A Dphy-da8xx-usb.h15 * @cfgchip: CFGCHIP syscon regmap
18 struct regmap *cfgchip; member
/kernel/linux/linux-5.10/drivers/phy/ti/
H A Dphy-da8xx-usb.c11 #include <linux/mfd/da8xx-cfgchip.h>
151 d_phy->regmap = pdata->cfgchip; in da8xx_usb_phy_probe()
154 "ti,da830-cfgchip"); in da8xx_usb_phy_probe()

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