Home
last modified time | relevance | path

Searched refs:cfg_reg (Results 1 - 25 of 43) sorted by relevance

12

/kernel/linux/linux-5.10/drivers/gpu/drm/loongson/
H A Dloongson_crtc.c313 lcrtc->cfg_reg |= 0x3; in loongson_crtc_mode_set_nofb()
314 crtc_write(lcrtc, FB_CFG_DVO_REG, lcrtc->cfg_reg); in loongson_crtc_mode_set_nofb()
318 lcrtc->cfg_reg |= 0x4; in loongson_crtc_mode_set_nofb()
319 crtc_write(lcrtc, FB_CFG_DVO_REG, lcrtc->cfg_reg); in loongson_crtc_mode_set_nofb()
333 if (lcrtc->cfg_reg & CFG_ENABLE) in loongson_crtc_atomic_enable()
336 lcrtc->cfg_reg |= CFG_ENABLE; in loongson_crtc_atomic_enable()
338 crtc_write(lcrtc, FB_CFG_DVO_REG, lcrtc->cfg_reg); in loongson_crtc_atomic_enable()
351 lcrtc->cfg_reg &= ~CFG_ENABLE; in loongson_crtc_atomic_disable()
353 crtc_write(lcrtc, FB_CFG_DVO_REG, lcrtc->cfg_reg); in loongson_crtc_atomic_disable()
404 ldev->lcrtc[1].cfg_reg | in loongson_plane_atomic_update()
[all...]
H A Dloongson_encoder.c47 lcrtc_origin->cfg_reg |= CFG_PANELSWITCH; in loongson_encoder_atomic_mode_set()
49 lcrtc_origin->cfg_reg &= ~CFG_PANELSWITCH; in loongson_encoder_atomic_mode_set()
52 crtc_write(lcrtc_origin, FB_CFG_DVO_REG, lcrtc_origin->cfg_reg); in loongson_encoder_atomic_mode_set()
/kernel/linux/linux-5.10/drivers/clk/spear/
H A Dclk-vco-pll.c134 p = readl_relaxed(pll->vco->cfg_reg); in clk_pll_recalc_rate()
157 val = readl_relaxed(pll->vco->cfg_reg); in clk_pll_set_rate()
160 writel_relaxed(val, pll->vco->cfg_reg); in clk_pll_set_rate()
204 val = readl_relaxed(vco->cfg_reg); in clk_vco_recalc_rate()
249 val = readl_relaxed(vco->cfg_reg); in clk_vco_set_rate()
261 writel_relaxed(val, vco->cfg_reg); in clk_vco_set_rate()
278 *cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt, in clk_register_vco_pll()
288 if (!vco_name || !pll_name || !parent_name || !mode_reg || !cfg_reg || in clk_register_vco_pll()
304 vco->cfg_reg = cfg_reg; in clk_register_vco_pll()
275 clk_register_vco_pll(const char *vco_name, const char *pll_name, const char *vco_gate_name, const char *parent_name, unsigned long flags, void __iomem *mode_reg, void __iomem *cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock, struct clk **pll_clk, struct clk **vco_gate_clk) clk_register_vco_pll() argument
[all...]
H A Dclk.h96 void __iomem *cfg_reg; member
126 *cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt,
/kernel/linux/linux-6.6/drivers/clk/spear/
H A Dclk-vco-pll.c131 p = readl_relaxed(pll->vco->cfg_reg); in clk_pll_recalc_rate()
154 val = readl_relaxed(pll->vco->cfg_reg); in clk_pll_set_rate()
157 writel_relaxed(val, pll->vco->cfg_reg); in clk_pll_set_rate()
201 val = readl_relaxed(vco->cfg_reg); in clk_vco_recalc_rate()
246 val = readl_relaxed(vco->cfg_reg); in clk_vco_set_rate()
258 writel_relaxed(val, vco->cfg_reg); in clk_vco_set_rate()
275 *cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt, in clk_register_vco_pll()
285 if (!vco_name || !pll_name || !parent_name || !mode_reg || !cfg_reg || in clk_register_vco_pll()
301 vco->cfg_reg = cfg_reg; in clk_register_vco_pll()
272 clk_register_vco_pll(const char *vco_name, const char *pll_name, const char *vco_gate_name, const char *parent_name, unsigned long flags, void __iomem *mode_reg, void __iomem *cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock, struct clk **pll_clk, struct clk **vco_gate_clk) clk_register_vco_pll() argument
[all...]
H A Dclk.h93 void __iomem *cfg_reg; member
123 *cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt,
/kernel/linux/linux-6.6/drivers/pinctrl/renesas/
H A Dcore.c872 const struct pinmux_cfg_reg *cfg_reg) in sh_pfc_check_cfg_reg()
877 sh_pfc_check_reg(drvname, cfg_reg->reg, in sh_pfc_check_cfg_reg()
878 GENMASK(cfg_reg->reg_width - 1, 0)); in sh_pfc_check_cfg_reg()
880 if (cfg_reg->field_width) { in sh_pfc_check_cfg_reg()
881 fw = cfg_reg->field_width; in sh_pfc_check_cfg_reg()
882 n = (cfg_reg->reg_width / fw) << fw; in sh_pfc_check_cfg_reg()
884 if (is0s(&cfg_reg->enum_ids[i], 1 << fw)) in sh_pfc_check_cfg_reg()
888 if ((r << fw) * sizeof(u16) > cfg_reg->reg_width / fw) in sh_pfc_check_cfg_reg()
890 cfg_reg->reg); in sh_pfc_check_cfg_reg()
896 for (i = 0, n = 0, rw = 0; (fw = cfg_reg in sh_pfc_check_cfg_reg()
871 sh_pfc_check_cfg_reg(const char *drvname, const struct pinmux_cfg_reg *cfg_reg) sh_pfc_check_cfg_reg() argument
[all...]
/kernel/linux/linux-5.10/arch/sparc/kernel/
H A Dsbus.c65 unsigned long cfg_reg; in sbus_set_sbus64() local
77 cfg_reg = iommu->write_complete_reg; in sbus_set_sbus64()
80 cfg_reg += 0x20UL; in sbus_set_sbus64()
83 cfg_reg += 0x28UL; in sbus_set_sbus64()
86 cfg_reg += 0x30UL; in sbus_set_sbus64()
89 cfg_reg += 0x38UL; in sbus_set_sbus64()
92 cfg_reg += 0x40UL; in sbus_set_sbus64()
95 cfg_reg += 0x48UL; in sbus_set_sbus64()
98 cfg_reg += 0x50UL; in sbus_set_sbus64()
105 val = upa_readq(cfg_reg); in sbus_set_sbus64()
[all...]
/kernel/linux/linux-6.6/arch/sparc/kernel/
H A Dsbus.c66 unsigned long cfg_reg; in sbus_set_sbus64() local
78 cfg_reg = iommu->write_complete_reg; in sbus_set_sbus64()
81 cfg_reg += 0x20UL; in sbus_set_sbus64()
84 cfg_reg += 0x28UL; in sbus_set_sbus64()
87 cfg_reg += 0x30UL; in sbus_set_sbus64()
90 cfg_reg += 0x38UL; in sbus_set_sbus64()
93 cfg_reg += 0x40UL; in sbus_set_sbus64()
96 cfg_reg += 0x48UL; in sbus_set_sbus64()
99 cfg_reg += 0x50UL; in sbus_set_sbus64()
106 val = upa_readq(cfg_reg); in sbus_set_sbus64()
[all...]
/kernel/linux/linux-5.10/drivers/pinctrl/renesas/
H A Dcore.c846 const struct pinmux_cfg_reg *cfg_reg) in sh_pfc_check_cfg_reg()
850 sh_pfc_check_reg(drvname, cfg_reg->reg); in sh_pfc_check_cfg_reg()
852 if (cfg_reg->field_width) { in sh_pfc_check_cfg_reg()
853 fw = cfg_reg->field_width; in sh_pfc_check_cfg_reg()
854 n = (cfg_reg->reg_width / fw) << fw; in sh_pfc_check_cfg_reg()
859 for (i = 0, n = 0, rw = 0; (fw = cfg_reg->var_field_width[i]); i++) { in sh_pfc_check_cfg_reg()
860 if (fw > 3 && is0s(&cfg_reg->enum_ids[n], 1 << fw)) in sh_pfc_check_cfg_reg()
862 cfg_reg->reg, rw, rw + fw - 1); in sh_pfc_check_cfg_reg()
867 if (rw != cfg_reg->reg_width) in sh_pfc_check_cfg_reg()
869 cfg_reg in sh_pfc_check_cfg_reg()
845 sh_pfc_check_cfg_reg(const char *drvname, const struct pinmux_cfg_reg *cfg_reg) sh_pfc_check_cfg_reg() argument
[all...]
/kernel/linux/linux-5.10/drivers/clk/
H A Dclk-lochnagar.c32 u16 cfg_reg; member
87 .cfg_reg = LOCHNAGAR1_##REG, \
96 .cfg_reg = LOCHNAGAR2_##ID##_CTRL, \
152 ret = regmap_update_bits(regmap, lclk->cfg_reg, in lochnagar_clk_prepare()
168 ret = regmap_update_bits(regmap, lclk->cfg_reg, lclk->ena_mask, 0); in lochnagar_clk_unprepare()
/kernel/linux/linux-6.6/drivers/clk/
H A Dclk-lochnagar.c32 u16 cfg_reg; member
87 .cfg_reg = LOCHNAGAR1_##REG, \
96 .cfg_reg = LOCHNAGAR2_##ID##_CTRL, \
152 ret = regmap_update_bits(regmap, lclk->cfg_reg, in lochnagar_clk_prepare()
168 ret = regmap_update_bits(regmap, lclk->cfg_reg, lclk->ena_mask, 0); in lochnagar_clk_unprepare()
/kernel/linux/linux-6.6/arch/arm/mach-omap1/
H A Dmux.c399 || !arch_mux_cfg->cfg_reg) { in omap_mux_register()
437 if (!mux_cfg->cfg_reg) in omap_cfg_reg()
440 return mux_cfg->cfg_reg(reg); in omap_cfg_reg()
449 arch_mux_cfg.cfg_reg = omap1_cfg_reg; in omap1_mux_init()
H A Dmux.h130 int (*cfg_reg)(const struct pin_config *cfg); member
/kernel/linux/linux-5.10/drivers/staging/wfx/
H A Dbh.c226 u32 cfg_reg; in ack_sdio_data() local
228 config_reg_read(wdev, &cfg_reg); in ack_sdio_data()
229 if (cfg_reg & 0xFF) { in ack_sdio_data()
231 cfg_reg & 0xFF); in ack_sdio_data()
/kernel/linux/linux-6.6/drivers/net/wireless/silabs/wfx/
H A Dbh.c224 u32 cfg_reg; in ack_sdio_data() local
226 wfx_config_reg_read(wdev, &cfg_reg); in ack_sdio_data()
227 if (cfg_reg & 0xFF) { in ack_sdio_data()
228 dev_warn(wdev->dev, "chip reports errors: %02x\n", cfg_reg & 0xFF); in ack_sdio_data()
/kernel/linux/linux-5.10/arch/arm/mach-omap1/
H A Dmux.c445 || !arch_mux_cfg->cfg_reg) { in omap_mux_register()
483 if (!mux_cfg->cfg_reg) in omap_cfg_reg()
486 return mux_cfg->cfg_reg(reg); in omap_cfg_reg()
495 arch_mux_cfg.cfg_reg = omap1_cfg_reg; in omap1_mux_init()
501 arch_mux_cfg.cfg_reg = omap1_cfg_reg; in omap1_mux_init()
/kernel/linux/linux-6.6/drivers/iommu/intel/
H A Dperfmon.c121 dmar_writel(iommu_pmu->cfg_reg + _idx * IOMMU_PMU_CFG_OFFSET + \
131 dmar_writel(iommu_pmu->cfg_reg + _idx * IOMMU_PMU_CFG_OFFSET + \
242 return iommu_pmu->cfg_reg + idx * IOMMU_PMU_CFG_OFFSET; in iommu_config_base()
662 iommu_pmu->cfg_reg = get_perf_reg_address(iommu, DMAR_PERFCFGOFF_REG); in alloc_iommu_pmu()
672 cap = dmar_readl(iommu_pmu->cfg_reg + in alloc_iommu_pmu()
696 cap = dmar_readl(iommu_pmu->cfg_reg + i * IOMMU_PMU_CFG_OFFSET + in alloc_iommu_pmu()
/kernel/linux/linux-5.10/drivers/net/ethernet/altera/
H A Daltera_tse_main.c638 u32 cfg_reg = ioread32(&priv->mac_dev->command_config); in altera_tse_adjust_link() local
644 cfg_reg |= MAC_CMDCFG_HD_ENA; in altera_tse_adjust_link()
646 cfg_reg &= ~MAC_CMDCFG_HD_ENA; in altera_tse_adjust_link()
659 cfg_reg |= MAC_CMDCFG_ETH_SPEED; in altera_tse_adjust_link()
660 cfg_reg &= ~MAC_CMDCFG_ENA_10; in altera_tse_adjust_link()
663 cfg_reg &= ~MAC_CMDCFG_ETH_SPEED; in altera_tse_adjust_link()
664 cfg_reg &= ~MAC_CMDCFG_ENA_10; in altera_tse_adjust_link()
667 cfg_reg &= ~MAC_CMDCFG_ETH_SPEED; in altera_tse_adjust_link()
668 cfg_reg |= MAC_CMDCFG_ENA_10; in altera_tse_adjust_link()
678 iowrite32(cfg_reg, in altera_tse_adjust_link()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/arm/display/komeda/d71/
H A Dd71_component.c577 u32 __iomem *cfg_reg, in compiz_enable_input()
593 malidp_write32(cfg_reg, CU_INPUT0_SIZE, in compiz_enable_input()
595 malidp_write32(cfg_reg, CU_INPUT0_OFFSET, in compiz_enable_input()
597 malidp_write32(cfg_reg, CU_INPUT0_CONTROL, ctrl); in compiz_enable_input()
605 u32 __iomem *id_reg, *cfg_reg; in d71_compiz_update() local
610 cfg_reg = reg + index * CU_PER_INPUT_REGS; in d71_compiz_update()
612 compiz_enable_input(id_reg, cfg_reg, in d71_compiz_update()
617 malidp_write32(cfg_reg, CU_INPUT0_CONTROL, 0); in d71_compiz_update()
576 compiz_enable_input(u32 __iomem *id_reg, u32 __iomem *cfg_reg, u32 input_hw_id, struct komeda_compiz_input_cfg *cin) compiz_enable_input() argument
/kernel/linux/linux-6.6/drivers/gpu/drm/arm/display/komeda/d71/
H A Dd71_component.c577 u32 __iomem *cfg_reg, in compiz_enable_input()
593 malidp_write32(cfg_reg, CU_INPUT0_SIZE, in compiz_enable_input()
595 malidp_write32(cfg_reg, CU_INPUT0_OFFSET, in compiz_enable_input()
597 malidp_write32(cfg_reg, CU_INPUT0_CONTROL, ctrl); in compiz_enable_input()
605 u32 __iomem *id_reg, *cfg_reg; in d71_compiz_update() local
610 cfg_reg = reg + index * CU_PER_INPUT_REGS; in d71_compiz_update()
612 compiz_enable_input(id_reg, cfg_reg, in d71_compiz_update()
617 malidp_write32(cfg_reg, CU_INPUT0_CONTROL, 0); in d71_compiz_update()
576 compiz_enable_input(u32 __iomem *id_reg, u32 __iomem *cfg_reg, u32 input_hw_id, struct komeda_compiz_input_cfg *cin) compiz_enable_input() argument
/kernel/linux/linux-5.10/drivers/net/ethernet/hisilicon/
H A Dhns_mdio.c146 u32 cfg_reg, u32 set_val, in mdio_sc_cfg_reg_write()
153 regmap_write(mdio_dev->subctrl_vbase, cfg_reg, set_val); in mdio_sc_cfg_reg_write()
145 mdio_sc_cfg_reg_write(struct hns_mdio_device *mdio_dev, u32 cfg_reg, u32 set_val, u32 st_reg, u32 st_msk, u8 check_st) mdio_sc_cfg_reg_write() argument
/kernel/linux/linux-6.6/drivers/net/ethernet/hisilicon/
H A Dhns_mdio.c146 u32 cfg_reg, u32 set_val, in mdio_sc_cfg_reg_write()
153 regmap_write(mdio_dev->subctrl_vbase, cfg_reg, set_val); in mdio_sc_cfg_reg_write()
145 mdio_sc_cfg_reg_write(struct hns_mdio_device *mdio_dev, u32 cfg_reg, u32 set_val, u32 st_reg, u32 st_msk, u8 check_st) mdio_sc_cfg_reg_write() argument
/kernel/linux/linux-5.10/drivers/mmc/host/
H A Datmel-mci.c263 * @cfg_reg: Value of the CFG register.
341 u32 cfg_reg; member
1260 atmci_writel(host, ATMCI_CFG, host->cfg_reg); in atmci_start_request()
1406 atmci_writel(host, ATMCI_CFG, host->cfg_reg); in atmci_set_ios()
1458 host->cfg_reg |= ATMCI_CFG_HSMODE; in atmci_set_ios()
1460 host->cfg_reg &= ~ATMCI_CFG_HSMODE; in atmci_set_ios()
1466 atmci_writel(host, ATMCI_CFG, host->cfg_reg); in atmci_set_ios()
1576 atmci_writel(host, ATMCI_CFG, host->cfg_reg);
1675 atmci_writel(host, ATMCI_CFG, host->cfg_reg); in atmci_detect_change()
/kernel/linux/linux-6.6/drivers/mmc/host/
H A Datmel-mci.c297 * @cfg_reg: Value of the CFG register.
375 u32 cfg_reg; member
1303 atmci_writel(host, ATMCI_CFG, host->cfg_reg); in atmci_start_request()
1449 atmci_writel(host, ATMCI_CFG, host->cfg_reg); in atmci_set_ios()
1501 host->cfg_reg |= ATMCI_CFG_HSMODE; in atmci_set_ios()
1503 host->cfg_reg &= ~ATMCI_CFG_HSMODE; in atmci_set_ios()
1509 atmci_writel(host, ATMCI_CFG, host->cfg_reg); in atmci_set_ios()
1618 atmci_writel(host, ATMCI_CFG, host->cfg_reg);
1716 atmci_writel(host, ATMCI_CFG, host->cfg_reg); in atmci_detect_change()

Completed in 25 milliseconds

12