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Searched refs:_offset (Results 1 - 25 of 186) sorted by relevance

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/kernel/linux/linux-5.10/drivers/thermal/qcom/
H A Dtsens.h81 #define REG_FIELD_FOR_EACH_SENSOR11(_name, _offset, _startbit, _stopbit) \
82 [_name##_##0] = REG_FIELD(_offset, _startbit, _stopbit), \
83 [_name##_##1] = REG_FIELD(_offset + 4, _startbit, _stopbit), \
84 [_name##_##2] = REG_FIELD(_offset + 8, _startbit, _stopbit), \
85 [_name##_##3] = REG_FIELD(_offset + 12, _startbit, _stopbit), \
86 [_name##_##4] = REG_FIELD(_offset + 16, _startbit, _stopbit), \
87 [_name##_##5] = REG_FIELD(_offset + 20, _startbit, _stopbit), \
88 [_name##_##6] = REG_FIELD(_offset + 24, _startbit, _stopbit), \
89 [_name##_##7] = REG_FIELD(_offset + 28, _startbit, _stopbit), \
90 [_name##_##8] = REG_FIELD(_offset
[all...]
/kernel/linux/linux-6.6/drivers/thermal/qcom/
H A Dtsens.h88 #define REG_FIELD_FOR_EACH_SENSOR11(_name, _offset, _startbit, _stopbit) \
89 [_name##_##0] = REG_FIELD(_offset, _startbit, _stopbit), \
90 [_name##_##1] = REG_FIELD(_offset + 4, _startbit, _stopbit), \
91 [_name##_##2] = REG_FIELD(_offset + 8, _startbit, _stopbit), \
92 [_name##_##3] = REG_FIELD(_offset + 12, _startbit, _stopbit), \
93 [_name##_##4] = REG_FIELD(_offset + 16, _startbit, _stopbit), \
94 [_name##_##5] = REG_FIELD(_offset + 20, _startbit, _stopbit), \
95 [_name##_##6] = REG_FIELD(_offset + 24, _startbit, _stopbit), \
96 [_name##_##7] = REG_FIELD(_offset + 28, _startbit, _stopbit), \
97 [_name##_##8] = REG_FIELD(_offset
[all...]
/kernel/linux/linux-5.10/drivers/clk/bcm/
H A Dclk-kona.h99 #define POLICY(_offset, _bit) \
101 .offset = (_offset), \
159 #define HW_SW_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \
161 .offset = (_offset), \
171 #define HW_SW_GATE_AUTO(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \
173 .offset = (_offset), \
182 #define HW_ENABLE_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \
184 .offset = (_offset), \
193 #define SW_ONLY_GATE(_offset, _status_bit, _en_bit) \
195 .offset = (_offset), \
[all...]
/kernel/linux/linux-6.6/drivers/clk/bcm/
H A Dclk-kona.h91 #define POLICY(_offset, _bit) \
93 .offset = (_offset), \
151 #define HW_SW_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \
153 .offset = (_offset), \
163 #define HW_SW_GATE_AUTO(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \
165 .offset = (_offset), \
174 #define HW_ENABLE_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \
176 .offset = (_offset), \
185 #define SW_ONLY_GATE(_offset, _status_bit, _en_bit) \
187 .offset = (_offset), \
[all...]
/kernel/linux/linux-5.10/drivers/net/ethernet/mellanox/mlxsw/
H A Dcore_acl_flex_keys.h52 #define MLXSW_AFK_ELEMENT_INFO(_type, _element, _offset, _shift, _size) \
57 .offset = _offset, \
64 #define MLXSW_AFK_ELEMENT_INFO_U32(_element, _offset, _shift, _size) \
66 _element, _offset, _shift, _size)
68 #define MLXSW_AFK_ELEMENT_INFO_BUF(_element, _offset, _size) \
70 _element, _offset, 0, _size)
84 #define MLXSW_AFK_ELEMENT_INST(_type, _element, _offset, \
90 .offset = _offset, \
99 #define MLXSW_AFK_ELEMENT_INST_U32(_element, _offset, _shift, _size) \
101 _element, _offset, _shif
[all...]
H A Ditem.h266 #define MLXSW_ITEM8(_type, _cname, _iname, _offset, _shift, _sizebits) \
268 .offset = _offset, \
282 #define MLXSW_ITEM8_INDEXED(_type, _cname, _iname, _offset, _shift, _sizebits, \
285 .offset = _offset, \
307 #define MLXSW_ITEM16(_type, _cname, _iname, _offset, _shift, _sizebits) \
309 .offset = _offset, \
323 #define MLXSW_ITEM16_INDEXED(_type, _cname, _iname, _offset, _shift, _sizebits, \
326 .offset = _offset, \
348 #define MLXSW_ITEM32(_type, _cname, _iname, _offset, _shift, _sizebits) \
350 .offset = _offset, \
[all...]
/kernel/linux/linux-6.6/drivers/net/ethernet/mellanox/mlxsw/
H A Dcore_acl_flex_keys.h54 #define MLXSW_AFK_ELEMENT_INFO(_type, _element, _offset, _shift, _size) \
59 .offset = _offset, \
66 #define MLXSW_AFK_ELEMENT_INFO_U32(_element, _offset, _shift, _size) \
68 _element, _offset, _shift, _size)
70 #define MLXSW_AFK_ELEMENT_INFO_BUF(_element, _offset, _size) \
72 _element, _offset, 0, _size)
86 #define MLXSW_AFK_ELEMENT_INST(_type, _element, _offset, \
92 .offset = _offset, \
101 #define MLXSW_AFK_ELEMENT_INST_U32(_element, _offset, _shift, _size) \
103 _element, _offset, _shif
[all...]
H A Ditem.h266 #define MLXSW_ITEM8(_type, _cname, _iname, _offset, _shift, _sizebits) \
268 .offset = _offset, \
284 #define MLXSW_ITEM8_INDEXED(_type, _cname, _iname, _offset, _shift, _sizebits, \
287 .offset = _offset, \
309 #define MLXSW_ITEM16(_type, _cname, _iname, _offset, _shift, _sizebits) \
311 .offset = _offset, \
327 #define MLXSW_ITEM16_INDEXED(_type, _cname, _iname, _offset, _shift, _sizebits, \
330 .offset = _offset, \
352 #define MLXSW_ITEM32(_type, _cname, _iname, _offset, _shift, _sizebits) \
354 .offset = _offset, \
[all...]
/kernel/linux/linux-6.6/drivers/clk/renesas/
H A Drcar-gen4-cpg.h36 #define DEF_GEN4_SDH(_name, _id, _parent, _offset) \
37 DEF_BASE(_name, _id, CLK_TYPE_GEN4_SDH, _parent, .offset = _offset)
39 #define DEF_GEN4_SD(_name, _id, _parent, _offset) \
40 DEF_BASE(_name, _id, CLK_TYPE_GEN4_SD, _parent, .offset = _offset)
50 #define DEF_GEN4_Z(_name, _id, _type, _parent, _div, _offset) \
51 DEF_BASE(_name, _id, _type, _parent, .div = _div, .offset = _offset)
H A Drcar-gen3-cpg.h37 #define DEF_GEN3_SDH(_name, _id, _parent, _offset) \
38 DEF_BASE(_name, _id, CLK_TYPE_GEN3_SDH, _parent, .offset = _offset)
40 #define DEF_GEN3_SD(_name, _id, _parent, _offset) \
41 DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset)
60 #define DEF_GEN3_Z(_name, _id, _type, _parent, _div, _offset) \
61 DEF_BASE(_name, _id, _type, _parent, .div = _div, .offset = _offset)
H A Drenesas-cpg-mssr.h53 #define DEF_DIV6P1(_name, _id, _parent, _offset) \
54 DEF_BASE(_name, _id, CLK_TYPE_DIV6P1, _parent, .offset = _offset)
55 #define DEF_DIV6_RO(_name, _id, _parent, _offset, _div) \
56 DEF_BASE(_name, _id, CLK_TYPE_DIV6_RO, _parent, .offset = _offset, .div = _div, .mult = 1)
/kernel/linux/linux-5.10/drivers/clk/tegra/
H A Dclk-tegra-periph.c132 #define MUX(_name, _parents, _offset, \
134 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
139 #define MUX_FLAGS(_name, _parents, _offset,\
141 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
146 #define MUX8(_name, _parents, _offset, \
148 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
153 #define MUX8_NOGATE_LOCK(_name, _parents, _offset, _clk_id, _lock) \
154 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \
159 #define MUX8_NOGATE(_name, _parents, _offset, _clk_id) \
160 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \
[all...]
/kernel/linux/linux-6.6/drivers/clk/tegra/
H A Dclk-tegra-periph.c132 #define MUX(_name, _parents, _offset, \
134 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
139 #define MUX_FLAGS(_name, _parents, _offset,\
141 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
146 #define MUX8(_name, _parents, _offset, \
148 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
153 #define MUX8_NOGATE_LOCK(_name, _parents, _offset, _clk_id, _lock) \
154 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \
159 #define MUX8_NOGATE(_name, _parents, _offset, _clk_id) \
160 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \
[all...]
/kernel/linux/linux-5.10/drivers/clk/sunxi-ng/
H A Dccu_mult.h17 #define _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, _min, _max) \
21 .offset = _offset, \
29 #define _SUNXI_CCU_MULT_OFFSET(_shift, _width, _offset) \
30 _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, 1, 0)
/kernel/linux/linux-6.6/drivers/clk/sunxi-ng/
H A Dccu_mult.h17 #define _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, _min, _max) \
21 .offset = _offset, \
29 #define _SUNXI_CCU_MULT_OFFSET(_shift, _width, _offset) \
30 _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, 1, 0)
/kernel/linux/linux-5.10/drivers/pinctrl/mediatek/
H A Dpinctrl-mtk-common.h109 #define MTK_PIN_DRV_GRP(_pin, _offset, _bit, _grp) \
112 .offset = _offset, \
134 #define MTK_PIN_PUPD_SPEC_SR(_pin, _offset, _pupd, _r1, _r0) \
137 .offset = _offset, \
157 #define MTK_PIN_IES_SMT_SPEC(_start, _end, _offset, _bit) \
162 .offset = _offset, \
/kernel/linux/linux-6.6/drivers/pinctrl/mediatek/
H A Dpinctrl-mtk-common.h109 #define MTK_PIN_DRV_GRP(_pin, _offset, _bit, _grp) \
112 .offset = _offset, \
134 #define MTK_PIN_PUPD_SPEC_SR(_pin, _offset, _pupd, _r1, _r0) \
137 .offset = _offset, \
157 #define MTK_PIN_IES_SMT_SPEC(_start, _end, _offset, _bit) \
162 .offset = _offset, \
/kernel/linux/linux-5.10/drivers/clk/renesas/
H A Drcar-gen3-cpg.h34 #define DEF_GEN3_SD(_name, _id, _parent, _offset) \
35 DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset)
54 #define DEF_GEN3_Z(_name, _id, _type, _parent, _div, _offset) \
55 DEF_BASE(_name, _id, _type, _parent, .div = _div, .offset = _offset)
H A Drenesas-cpg-mssr.h53 #define DEF_DIV6P1(_name, _id, _parent, _offset) \
54 DEF_BASE(_name, _id, CLK_TYPE_DIV6P1, _parent, .offset = _offset)
55 #define DEF_DIV6_RO(_name, _id, _parent, _offset, _div) \
56 DEF_BASE(_name, _id, CLK_TYPE_DIV6_RO, _parent, .offset = _offset, .div = _div, .mult = 1)
/kernel/linux/linux-5.10/tools/objtool/
H A Delf.h103 #define for_offset_range(_offset, _start, _end) \
104 for (_offset = ((_start) & OFFSET_STRIDE_MASK); \
105 _offset >= ((_start) & OFFSET_STRIDE_MASK) && \
106 _offset <= ((_end) & OFFSET_STRIDE_MASK); \
107 _offset += OFFSET_STRIDE)
/kernel/linux/linux-6.6/drivers/clk/mediatek/
H A Dclk-mt6795-apmixedsys.c76 #define _FH(_pllid, _fhid, _slope, _offset) { \
81 .fhx_offset = _offset, \
99 #define FH(_pllid, _fhid, _offset) _FH(_pllid, _fhid, 0x6003c97, _offset)
100 #define FH_M(_pllid, _fhid, _offset) _FH(_pllid, _fhid, 0x6000140, _offset)
/kernel/linux/linux-5.10/drivers/staging/rtl8723bs/hal/
H A DHalPhyRf.c12 #define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _deltaThermal) \
14 for (_offset = 0; _offset < _size; _offset++) {\
15 if (_deltaThermal < thermalThreshold[_direction][_offset]) {\
16 if (_offset != 0)\
17 _offset--;\
21 if (_offset >= _size)\
22 _offset = _size-1;\
/kernel/linux/linux-5.10/drivers/video/fbdev/vermilion/
H A Dvermilion.h240 #define VML_READ32(_par, _offset) \
241 (ioread32((_par)->vdc_mem + (_offset)))
242 #define VML_WRITE32(_par, _offset, _value) \
243 iowrite32(_value, (_par)->vdc_mem + (_offset))
/kernel/linux/linux-6.6/drivers/video/fbdev/vermilion/
H A Dvermilion.h240 #define VML_READ32(_par, _offset) \
241 (ioread32((_par)->vdc_mem + (_offset)))
242 #define VML_WRITE32(_par, _offset, _value) \
243 iowrite32(_value, (_par)->vdc_mem + (_offset))
/kernel/linux/linux-5.10/drivers/bcma/
H A Dsprom.c185 #define SPEX(_field, _offset, _mask, _shift) \
186 bus->sprom._field = ((sprom[SPOFF(_offset)] & (_mask)) >> (_shift))
188 #define SPEX32(_field, _offset, _mask, _shift) \
189 bus->sprom._field = ((((u32)sprom[SPOFF((_offset)+2)] << 16 | \
190 sprom[SPOFF(_offset)]) & (_mask)) >> (_shift))
192 #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \
194 SPEX(_field[0], _offset + 0, _mask, _shift); \
195 SPEX(_field[1], _offset + 2, _mask, _shift); \
196 SPEX(_field[2], _offset + 4, _mask, _shift); \
197 SPEX(_field[3], _offset
[all...]

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