Home
last modified time | relevance | path

Searched refs:XGMAC_DMA_IOWRITE (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-dev.c673 XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, in xgbe_enable_dma_interrupts()
716 XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, channel->curr_ier); in xgbe_enable_dma_interrupts()
1433 XGMAC_DMA_IOWRITE(channel, DMA_CH_TDRLR, ring->rdesc_count - 1); in xgbe_tx_desc_init()
1437 XGMAC_DMA_IOWRITE(channel, DMA_CH_TDLR_HI, in xgbe_tx_desc_init()
1439 XGMAC_DMA_IOWRITE(channel, DMA_CH_TDLR_LO, in xgbe_tx_desc_init()
1512 XGMAC_DMA_IOWRITE(channel, DMA_CH_RDRLR, ring->rdesc_count - 1); in xgbe_rx_desc_init()
1516 XGMAC_DMA_IOWRITE(channel, DMA_CH_RDLR_HI, in xgbe_rx_desc_init()
1518 XGMAC_DMA_IOWRITE(channel, DMA_CH_RDLR_LO, in xgbe_rx_desc_init()
1523 XGMAC_DMA_IOWRITE(channel, DMA_CH_RDTR_LO, in xgbe_rx_desc_init()
1660 XGMAC_DMA_IOWRITE(channe in xgbe_tx_start_xmit()
[all...]
H A Dxgbe-common.h1520 #define XGMAC_DMA_IOWRITE(_channel, _reg, _val) \ macro
1529 XGMAC_DMA_IOWRITE((_channel), _reg, reg_val); \
H A Dxgbe-drv.c536 XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_ch_isr); in xgbe_isr_task()
639 XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_status); in xgbe_dma_isr()
2356 XGMAC_DMA_IOWRITE(channel, DMA_CH_RDTR_LO, in xgbe_rx_refresh()
/kernel/linux/linux-6.6/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-dev.c673 XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, in xgbe_enable_dma_interrupts()
716 XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, channel->curr_ier); in xgbe_enable_dma_interrupts()
1483 XGMAC_DMA_IOWRITE(channel, DMA_CH_TDRLR, ring->rdesc_count - 1); in xgbe_tx_desc_init()
1487 XGMAC_DMA_IOWRITE(channel, DMA_CH_TDLR_HI, in xgbe_tx_desc_init()
1489 XGMAC_DMA_IOWRITE(channel, DMA_CH_TDLR_LO, in xgbe_tx_desc_init()
1562 XGMAC_DMA_IOWRITE(channel, DMA_CH_RDRLR, ring->rdesc_count - 1); in xgbe_rx_desc_init()
1566 XGMAC_DMA_IOWRITE(channel, DMA_CH_RDLR_HI, in xgbe_rx_desc_init()
1568 XGMAC_DMA_IOWRITE(channel, DMA_CH_RDLR_LO, in xgbe_rx_desc_init()
1573 XGMAC_DMA_IOWRITE(channel, DMA_CH_RDTR_LO, in xgbe_rx_desc_init()
1710 XGMAC_DMA_IOWRITE(channe in xgbe_tx_start_xmit()
[all...]
H A Dxgbe-common.h1560 #define XGMAC_DMA_IOWRITE(_channel, _reg, _val) \ macro
1569 XGMAC_DMA_IOWRITE((_channel), _reg, reg_val); \
H A Dxgbe-drv.c536 XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_ch_isr); in xgbe_isr_task()
639 XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_status); in xgbe_dma_isr()
2347 XGMAC_DMA_IOWRITE(channel, DMA_CH_RDTR_LO, in xgbe_rx_refresh()

Completed in 21 milliseconds