| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| H A D | uvd_v4_2.c | 301 WREG32_UVD_CTX(ixUVD_LMI_CACHE_CTRL, tmp & (~0x10)); in uvd_v4_2_start()
582 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v4_2_enable_mgcg()
591 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v4_2_enable_mgcg()
624 WREG32_UVD_CTX(ixUVD_CGC_CTRL2, tmp2); in uvd_v4_2_set_dcm()
|
| H A D | uvd_v3_1.c | 226 WREG32_UVD_CTX(ixUVD_CGC_CTRL2, tmp2); in uvd_v3_1_set_dcm()
365 WREG32_UVD_CTX(ixUVD_LMI_CACHE_CTRL, tmp & (~0x10)); in uvd_v3_1_start()
601 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v3_1_enable_mgcg()
610 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v3_1_enable_mgcg()
|
| H A D | uvd_v5_0.c | 742 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v5_0_enable_mgcg()
751 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v5_0_enable_mgcg()
|
| H A D | amdgpu_cgs.c | 96 return WREG32_UVD_CTX(index, value); in amdgpu_cgs_write_ind_register()
|
| H A D | uvd_v6_0.c | 1405 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v6_0_enable_mgcg()
1414 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v6_0_enable_mgcg()
|
| H A D | amdgpu.h | 1083 #define WREG32_UVD_CTX(reg, v) adev->uvd_ctx_wreg(adev, (reg), (v)) macro
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| H A D | uvd_v4_2.c | 327 WREG32_UVD_CTX(ixUVD_LMI_CACHE_CTRL, tmp & (~0x10)); in uvd_v4_2_start()
612 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v4_2_enable_mgcg()
621 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v4_2_enable_mgcg()
654 WREG32_UVD_CTX(ixUVD_CGC_CTRL2, tmp2); in uvd_v4_2_set_dcm()
|
| H A D | uvd_v3_1.c | 230 WREG32_UVD_CTX(ixUVD_CGC_CTRL2, tmp2); in uvd_v3_1_set_dcm()
369 WREG32_UVD_CTX(ixUVD_LMI_CACHE_CTRL, tmp & (~0x10)); in uvd_v3_1_start()
605 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v3_1_enable_mgcg()
614 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v3_1_enable_mgcg()
|
| H A D | uvd_v5_0.c | 771 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v5_0_enable_mgcg()
780 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v5_0_enable_mgcg()
|
| H A D | amdgpu_cgs.c | 96 return WREG32_UVD_CTX(index, value); in amdgpu_cgs_write_ind_register()
|
| H A D | uvd_v6_0.c | 1431 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v6_0_enable_mgcg()
1440 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v6_0_enable_mgcg()
|
| H A D | amdgpu.h | 1188 #define WREG32_UVD_CTX(reg, v) adev->uvd_ctx_wreg(adev, (reg), (v)) macro
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| H A D | si.c | 5193 WREG32_UVD_CTX(UVD_CGC_CTRL2, tmp2); in si_set_uvd_dcm()
5463 WREG32_UVD_CTX(UVD_CGC_MEM_CTRL, tmp); in si_enable_uvd_mgcg()
5475 WREG32_UVD_CTX(UVD_CGC_MEM_CTRL, tmp); in si_enable_uvd_mgcg()
|
| H A D | radeon.h | 2545 #define WREG32_UVD_CTX(reg, v) r600_uvd_ctx_wreg(rdev, (reg), (v)) macro
|
| H A D | cik.c | 6221 WREG32_UVD_CTX(UVD_CGC_MEM_CTRL, data); in cik_enable_uvd_mgcg()
6230 WREG32_UVD_CTX(UVD_CGC_MEM_CTRL, data); in cik_enable_uvd_mgcg()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
| H A D | si.c | 5188 WREG32_UVD_CTX(UVD_CGC_CTRL2, tmp2); in si_set_uvd_dcm()
5458 WREG32_UVD_CTX(UVD_CGC_MEM_CTRL, tmp); in si_enable_uvd_mgcg()
5470 WREG32_UVD_CTX(UVD_CGC_MEM_CTRL, tmp); in si_enable_uvd_mgcg()
|
| H A D | radeon.h | 2531 #define WREG32_UVD_CTX(reg, v) r600_uvd_ctx_wreg(rdev, (reg), (v)) macro
|
| H A D | cik.c | 6210 WREG32_UVD_CTX(UVD_CGC_MEM_CTRL, data); in cik_enable_uvd_mgcg()
6219 WREG32_UVD_CTX(UVD_CGC_MEM_CTRL, data); in cik_enable_uvd_mgcg()
|