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Searched refs:TLBTEMP_BASE_1 (Results 1 - 10 of 10) sorted by relevance

/kernel/linux/linux-5.10/arch/xtensa/mm/
H A Dcache.c70 kvaddr = TLBTEMP_BASE_1 + in kmap_invalidate_coherent()
96 void *kvaddr = coherent_kvaddr(page, TLBTEMP_BASE_1, vaddr, &paddr); in clear_user_highpage()
110 void *dst_vaddr = coherent_kvaddr(dst, TLBTEMP_BASE_1, vaddr, in copy_user_highpage()
162 virt = TLBTEMP_BASE_1 + (phys & DCACHE_ALIAS_MASK); in flush_dcache_page()
165 virt = TLBTEMP_BASE_1 + (temp & DCACHE_ALIAS_MASK); in flush_dcache_page()
204 unsigned long virt = TLBTEMP_BASE_1 + (address & DCACHE_ALIAS_MASK); in local_flush_cache_page()
237 tmp = TLBTEMP_BASE_1 + (phys & DCACHE_ALIAS_MASK); in update_mmu_cache()
239 tmp = TLBTEMP_BASE_1 + (addr & DCACHE_ALIAS_MASK); in update_mmu_cache()
275 unsigned long t = TLBTEMP_BASE_1 + (vaddr & DCACHE_ALIAS_MASK); in copy_to_user_page()
291 unsigned long t = TLBTEMP_BASE_1 in copy_to_user_page()
[all...]
H A Dhighmem.c86 BUILD_BUG_ON(PKMAP_BASE < TLBTEMP_BASE_1 + TLBTEMP_SIZE); in kmap_init()
/kernel/linux/linux-6.6/arch/xtensa/mm/
H A Dcache.c70 kvaddr = TLBTEMP_BASE_1 + in kmap_invalidate_coherent()
91 void *kvaddr = coherent_kvaddr(page, TLBTEMP_BASE_1, vaddr, &paddr); in clear_user_highpage()
105 void *dst_vaddr = coherent_kvaddr(dst, TLBTEMP_BASE_1, vaddr, in copy_user_highpage()
158 virt = TLBTEMP_BASE_1 + (phys & DCACHE_ALIAS_MASK); in flush_dcache_folio()
161 virt = TLBTEMP_BASE_1 + (temp & DCACHE_ALIAS_MASK); in flush_dcache_folio()
203 unsigned long virt = TLBTEMP_BASE_1 + (address & DCACHE_ALIAS_MASK); in local_flush_cache_page()
239 tmp = TLBTEMP_BASE_1 + (phys & DCACHE_ALIAS_MASK); in update_mmu_cache_range()
241 tmp = TLBTEMP_BASE_1 + (addr & DCACHE_ALIAS_MASK); in update_mmu_cache_range()
281 unsigned long t = TLBTEMP_BASE_1 + (vaddr & DCACHE_ALIAS_MASK); in copy_to_user_page()
297 unsigned long t = TLBTEMP_BASE_1 in copy_to_user_page()
[all...]
H A Dhighmem.c57 BUILD_BUG_ON(PKMAP_BASE < TLBTEMP_BASE_1 + TLBTEMP_SIZE); in kmap_init()
H A Dmmu.c57 BUILD_BUG_ON(FIXADDR_START < TLBTEMP_BASE_1 + TLBTEMP_SIZE); in fixedrange_init()
/kernel/linux/linux-5.10/arch/xtensa/include/asm/
H A Dfixmap.h66 TLBTEMP_BASE_1 + TLBTEMP_SIZE); in fix_to_virt()
H A Dpgtable.h72 #define TLBTEMP_BASE_1 (VMALLOC_START + 0x08000000) macro
73 #define TLBTEMP_BASE_2 (TLBTEMP_BASE_1 + DCACHE_WAY_SIZE)
/kernel/linux/linux-6.6/arch/xtensa/include/asm/
H A Dpgtable.h70 #define TLBTEMP_BASE_1 (VMALLOC_START + 0x08000000) macro
71 #define TLBTEMP_BASE_2 (TLBTEMP_BASE_1 + DCACHE_WAY_SIZE)
/kernel/linux/linux-5.10/arch/xtensa/kernel/
H A Dentry.S1724 movi a3, TLBTEMP_BASE_1
/kernel/linux/linux-6.6/arch/xtensa/kernel/
H A Dentry.S1753 movi a3, TLBTEMP_BASE_1

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