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Searched refs:SUNXI_CCU_PHASE (Results 1 - 20 of 20) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/sunxi-ng/
H A Dccu-sun8i-a23.c306 static SUNXI_CCU_PHASE(mmc0_sample_clk, "mmc0_sample", "mmc0",
308 static SUNXI_CCU_PHASE(mmc0_output_clk, "mmc0_output", "mmc0",
318 static SUNXI_CCU_PHASE(mmc1_sample_clk, "mmc1_sample", "mmc1",
320 static SUNXI_CCU_PHASE(mmc1_output_clk, "mmc1_output", "mmc1",
330 static SUNXI_CCU_PHASE(mmc2_sample_clk, "mmc2_sample", "mmc2",
332 static SUNXI_CCU_PHASE(mmc2_output_clk, "mmc2_output", "mmc2",
H A Dccu-suniv-f1c100s.c213 static SUNXI_CCU_PHASE(mmc0_sample_clk, "mmc0_sample", "mmc0",
215 static SUNXI_CCU_PHASE(mmc0_output_clk, "mmc0_output", "mmc0",
225 static SUNXI_CCU_PHASE(mmc1_sample_clk, "mmc1_sample", "mmc1",
227 static SUNXI_CCU_PHASE(mmc1_output_clk, "mmc1_output", "mmc1",
H A Dccu_phase.h20 #define SUNXI_CCU_PHASE(_struct, _name, _parent, _reg, _shift, _width, _flags) \ macro
H A Dccu-sun8i-a33.c320 static SUNXI_CCU_PHASE(mmc0_sample_clk, "mmc0_sample", "mmc0",
322 static SUNXI_CCU_PHASE(mmc0_output_clk, "mmc0_output", "mmc0",
332 static SUNXI_CCU_PHASE(mmc1_sample_clk, "mmc1_sample", "mmc1",
334 static SUNXI_CCU_PHASE(mmc1_output_clk, "mmc1_output", "mmc1",
344 static SUNXI_CCU_PHASE(mmc2_sample_clk, "mmc2_sample", "mmc2",
346 static SUNXI_CCU_PHASE(mmc2_output_clk, "mmc2_output", "mmc2",
H A Dccu-sun8i-v3s.c266 static SUNXI_CCU_PHASE(mmc0_sample_clk, "mmc0_sample", "mmc0",
268 static SUNXI_CCU_PHASE(mmc0_output_clk, "mmc0_output", "mmc0",
278 static SUNXI_CCU_PHASE(mmc1_sample_clk, "mmc1_sample", "mmc1",
280 static SUNXI_CCU_PHASE(mmc1_output_clk, "mmc1_output", "mmc1",
290 static SUNXI_CCU_PHASE(mmc2_sample_clk, "mmc2_sample", "mmc2",
292 static SUNXI_CCU_PHASE(mmc2_output_clk, "mmc2_output", "mmc2",
H A Dccu-sun8i-a83t.c409 static SUNXI_CCU_PHASE(mmc0_sample_clk, "mmc0-sample", "mmc0",
411 static SUNXI_CCU_PHASE(mmc0_output_clk, "mmc0-output", "mmc0",
422 static SUNXI_CCU_PHASE(mmc1_sample_clk, "mmc1-sample", "mmc1",
424 static SUNXI_CCU_PHASE(mmc1_output_clk, "mmc1-output", "mmc1",
430 static SUNXI_CCU_PHASE(mmc2_sample_clk, "mmc2-sample", "mmc2",
432 static SUNXI_CCU_PHASE(mmc2_output_clk, "mmc2-output", "mmc2",
H A Dccu-sun6i-a31.c384 static SUNXI_CCU_PHASE(mmc0_sample_clk, "mmc0_sample", "mmc0",
386 static SUNXI_CCU_PHASE(mmc0_output_clk, "mmc0_output", "mmc0",
397 static SUNXI_CCU_PHASE(mmc1_sample_clk, "mmc1_sample", "mmc1",
399 static SUNXI_CCU_PHASE(mmc1_output_clk, "mmc1_output", "mmc1",
410 static SUNXI_CCU_PHASE(mmc2_sample_clk, "mmc2_sample", "mmc2",
412 static SUNXI_CCU_PHASE(mmc2_output_clk, "mmc2_output", "mmc2",
423 static SUNXI_CCU_PHASE(mmc3_sample_clk, "mmc3_sample", "mmc3",
425 static SUNXI_CCU_PHASE(mmc3_output_clk, "mmc3_output", "mmc3",
H A Dccu-sun9i-a80.c432 static SUNXI_CCU_PHASE(mmc0_sample_clk, "mmc0-sample", "mmc0",
434 static SUNXI_CCU_PHASE(mmc0_output_clk, "mmc0-output", "mmc0",
445 static SUNXI_CCU_PHASE(mmc1_sample_clk, "mmc1-sample", "mmc1",
447 static SUNXI_CCU_PHASE(mmc1_output_clk, "mmc1-output", "mmc1",
458 static SUNXI_CCU_PHASE(mmc2_sample_clk, "mmc2-sample", "mmc2",
460 static SUNXI_CCU_PHASE(mmc2_output_clk, "mmc2-output", "mmc2",
471 static SUNXI_CCU_PHASE(mmc3_sample_clk, "mmc3-sample", "mmc3",
473 static SUNXI_CCU_PHASE(mmc3_output_clk, "mmc3-output", "mmc3",
H A Dccu-sun8i-h3.c346 static SUNXI_CCU_PHASE(mmc0_sample_clk, "mmc0_sample", "mmc0",
348 static SUNXI_CCU_PHASE(mmc0_output_clk, "mmc0_output", "mmc0",
358 static SUNXI_CCU_PHASE(mmc1_sample_clk, "mmc1_sample", "mmc1",
360 static SUNXI_CCU_PHASE(mmc1_output_clk, "mmc1_output", "mmc1",
370 static SUNXI_CCU_PHASE(mmc2_sample_clk, "mmc2_sample", "mmc2",
372 static SUNXI_CCU_PHASE(mmc2_output_clk, "mmc2_output", "mmc2",
H A Dccu-sun4i-a10.c472 static SUNXI_CCU_PHASE(mmc0_output_clk, "mmc0_output", "mmc0",
474 static SUNXI_CCU_PHASE(mmc0_sample_clk, "mmc0_sample", "mmc0",
485 static SUNXI_CCU_PHASE(mmc1_output_clk, "mmc1_output", "mmc1",
487 static SUNXI_CCU_PHASE(mmc1_sample_clk, "mmc1_sample", "mmc1",
498 static SUNXI_CCU_PHASE(mmc2_output_clk, "mmc2_output", "mmc2",
500 static SUNXI_CCU_PHASE(mmc2_sample_clk, "mmc2_sample", "mmc2",
511 static SUNXI_CCU_PHASE(mmc3_output_clk, "mmc3_output", "mmc3",
513 static SUNXI_CCU_PHASE(mmc3_sample_clk, "mmc3_sample", "mmc3",
/kernel/linux/linux-6.6/drivers/clk/sunxi-ng/
H A Dccu-sun8i-a23.c307 static SUNXI_CCU_PHASE(mmc0_sample_clk, "mmc0_sample", "mmc0",
309 static SUNXI_CCU_PHASE(mmc0_output_clk, "mmc0_output", "mmc0",
319 static SUNXI_CCU_PHASE(mmc1_sample_clk, "mmc1_sample", "mmc1",
321 static SUNXI_CCU_PHASE(mmc1_output_clk, "mmc1_output", "mmc1",
331 static SUNXI_CCU_PHASE(mmc2_sample_clk, "mmc2_sample", "mmc2",
333 static SUNXI_CCU_PHASE(mmc2_output_clk, "mmc2_output", "mmc2",
H A Dccu-suniv-f1c100s.c214 static SUNXI_CCU_PHASE(mmc0_sample_clk, "mmc0_sample", "mmc0",
216 static SUNXI_CCU_PHASE(mmc0_output_clk, "mmc0_output", "mmc0",
226 static SUNXI_CCU_PHASE(mmc1_sample_clk, "mmc1_sample", "mmc1",
228 static SUNXI_CCU_PHASE(mmc1_output_clk, "mmc1_output", "mmc1",
H A Dccu_phase.h20 #define SUNXI_CCU_PHASE(_struct, _name, _parent, _reg, _shift, _width, _flags) \ macro
H A Dccu-sun8i-a33.c321 static SUNXI_CCU_PHASE(mmc0_sample_clk, "mmc0_sample", "mmc0",
323 static SUNXI_CCU_PHASE(mmc0_output_clk, "mmc0_output", "mmc0",
333 static SUNXI_CCU_PHASE(mmc1_sample_clk, "mmc1_sample", "mmc1",
335 static SUNXI_CCU_PHASE(mmc1_output_clk, "mmc1_output", "mmc1",
345 static SUNXI_CCU_PHASE(mmc2_sample_clk, "mmc2_sample", "mmc2",
347 static SUNXI_CCU_PHASE(mmc2_output_clk, "mmc2_output", "mmc2",
H A Dccu-sun8i-v3s.c279 static SUNXI_CCU_PHASE(mmc0_sample_clk, "mmc0_sample", "mmc0",
281 static SUNXI_CCU_PHASE(mmc0_output_clk, "mmc0_output", "mmc0",
291 static SUNXI_CCU_PHASE(mmc1_sample_clk, "mmc1_sample", "mmc1",
293 static SUNXI_CCU_PHASE(mmc1_output_clk, "mmc1_output", "mmc1",
303 static SUNXI_CCU_PHASE(mmc2_sample_clk, "mmc2_sample", "mmc2",
305 static SUNXI_CCU_PHASE(mmc2_output_clk, "mmc2_output", "mmc2",
H A Dccu-sun8i-a83t.c409 static SUNXI_CCU_PHASE(mmc0_sample_clk, "mmc0-sample", "mmc0",
411 static SUNXI_CCU_PHASE(mmc0_output_clk, "mmc0-output", "mmc0",
422 static SUNXI_CCU_PHASE(mmc1_sample_clk, "mmc1-sample", "mmc1",
424 static SUNXI_CCU_PHASE(mmc1_output_clk, "mmc1-output", "mmc1",
430 static SUNXI_CCU_PHASE(mmc2_sample_clk, "mmc2-sample", "mmc2",
432 static SUNXI_CCU_PHASE(mmc2_output_clk, "mmc2-output", "mmc2",
H A Dccu-sun6i-a31.c385 static SUNXI_CCU_PHASE(mmc0_sample_clk, "mmc0_sample", "mmc0",
387 static SUNXI_CCU_PHASE(mmc0_output_clk, "mmc0_output", "mmc0",
398 static SUNXI_CCU_PHASE(mmc1_sample_clk, "mmc1_sample", "mmc1",
400 static SUNXI_CCU_PHASE(mmc1_output_clk, "mmc1_output", "mmc1",
411 static SUNXI_CCU_PHASE(mmc2_sample_clk, "mmc2_sample", "mmc2",
413 static SUNXI_CCU_PHASE(mmc2_output_clk, "mmc2_output", "mmc2",
424 static SUNXI_CCU_PHASE(mmc3_sample_clk, "mmc3_sample", "mmc3",
426 static SUNXI_CCU_PHASE(mmc3_output_clk, "mmc3_output", "mmc3",
H A Dccu-sun9i-a80.c432 static SUNXI_CCU_PHASE(mmc0_sample_clk, "mmc0-sample", "mmc0",
434 static SUNXI_CCU_PHASE(mmc0_output_clk, "mmc0-output", "mmc0",
445 static SUNXI_CCU_PHASE(mmc1_sample_clk, "mmc1-sample", "mmc1",
447 static SUNXI_CCU_PHASE(mmc1_output_clk, "mmc1-output", "mmc1",
458 static SUNXI_CCU_PHASE(mmc2_sample_clk, "mmc2-sample", "mmc2",
460 static SUNXI_CCU_PHASE(mmc2_output_clk, "mmc2-output", "mmc2",
471 static SUNXI_CCU_PHASE(mmc3_sample_clk, "mmc3-sample", "mmc3",
473 static SUNXI_CCU_PHASE(mmc3_output_clk, "mmc3-output", "mmc3",
H A Dccu-sun8i-h3.c348 static SUNXI_CCU_PHASE(mmc0_sample_clk, "mmc0_sample", "mmc0",
350 static SUNXI_CCU_PHASE(mmc0_output_clk, "mmc0_output", "mmc0",
360 static SUNXI_CCU_PHASE(mmc1_sample_clk, "mmc1_sample", "mmc1",
362 static SUNXI_CCU_PHASE(mmc1_output_clk, "mmc1_output", "mmc1",
372 static SUNXI_CCU_PHASE(mmc2_sample_clk, "mmc2_sample", "mmc2",
374 static SUNXI_CCU_PHASE(mmc2_output_clk, "mmc2_output", "mmc2",
H A Dccu-sun4i-a10.c474 static SUNXI_CCU_PHASE(mmc0_output_clk, "mmc0_output", "mmc0",
476 static SUNXI_CCU_PHASE(mmc0_sample_clk, "mmc0_sample", "mmc0",
487 static SUNXI_CCU_PHASE(mmc1_output_clk, "mmc1_output", "mmc1",
489 static SUNXI_CCU_PHASE(mmc1_sample_clk, "mmc1_sample", "mmc1",
500 static SUNXI_CCU_PHASE(mmc2_output_clk, "mmc2_output", "mmc2",
502 static SUNXI_CCU_PHASE(mmc2_sample_clk, "mmc2_sample", "mmc2",
513 static SUNXI_CCU_PHASE(mmc3_output_clk, "mmc3_output", "mmc3",
515 static SUNXI_CCU_PHASE(mmc3_sample_clk, "mmc3_sample", "mmc3",

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