Home
last modified time | relevance | path

Searched refs:SUN8I_HDMI_PHY_ANA_CFG1_REG (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/sun4i/
H A Dsun8i_hdmi_phy.c293 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_config_h3()
329 regmap_write(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, ana_cfg1_end); in sun8i_hdmi_phy_config_h3()
371 regmap_write(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_disable_h3()
437 regmap_write(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, 0); in sun8i_hdmi_phy_init_h3()
438 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
442 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
445 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
449 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
453 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
457 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
[all...]
H A Dsun8i_dw_hdmi.h34 #define SUN8I_HDMI_PHY_ANA_CFG1_REG 0x0020 macro
/kernel/linux/linux-6.6/drivers/gpu/drm/sun4i/
H A Dsun8i_hdmi_phy.c340 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_h3_hdmi_phy_config()
376 regmap_write(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, ana_cfg1_end); in sun8i_h3_hdmi_phy_config()
387 regmap_write(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_h3_hdmi_phy_disable()
446 regmap_write(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, 0); in sun8i_hdmi_phy_init_h3()
447 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
451 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
454 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
458 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
462 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
466 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_init_h3()
[all...]
H A Dsun8i_dw_hdmi.h33 #define SUN8I_HDMI_PHY_ANA_CFG1_REG 0x0020 macro

Completed in 4 milliseconds