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Help
Searched
refs:RADEON_MCLK_CNTL
(Results
1 - 6
of
6
) sorted by relevance
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H
A
D
radeon_clocks.c
88
post_div = RREG32_PLL(
RADEON_MCLK_CNTL
) & 0x7;
in radeon_legacy_get_memory_clock()
605
tmp = RREG32_PLL(
RADEON_MCLK_CNTL
);
in radeon_legacy_set_clock_gating()
620
tmp = RREG32_PLL(
RADEON_MCLK_CNTL
);
in radeon_legacy_set_clock_gating()
635
WREG32_PLL(
RADEON_MCLK_CNTL
, tmp);
in radeon_legacy_set_clock_gating()
812
tmp = RREG32_PLL(
RADEON_MCLK_CNTL
);
in radeon_legacy_set_clock_gating()
817
WREG32_PLL(
RADEON_MCLK_CNTL
, tmp);
in radeon_legacy_set_clock_gating()
882
tmp = RREG32_PLL(
RADEON_MCLK_CNTL
);
in radeon_legacy_set_clock_gating()
885
WREG32_PLL(
RADEON_MCLK_CNTL
, tmp);
in radeon_legacy_set_clock_gating()
H
A
D
radeon_combios.c
3159
(
RADEON_MCLK_CNTL
);
in combios_parse_pll_table()
3162
WREG32_PLL(
RADEON_MCLK_CNTL
,
in combios_parse_pll_table()
H
A
D
radeon_reg.h
1175
#define
RADEON_MCLK_CNTL
0x0012 /* PLL */
macro
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H
A
D
radeon_clocks.c
88
post_div = RREG32_PLL(
RADEON_MCLK_CNTL
) & 0x7;
in radeon_legacy_get_memory_clock()
605
tmp = RREG32_PLL(
RADEON_MCLK_CNTL
);
in radeon_legacy_set_clock_gating()
620
tmp = RREG32_PLL(
RADEON_MCLK_CNTL
);
in radeon_legacy_set_clock_gating()
635
WREG32_PLL(
RADEON_MCLK_CNTL
, tmp);
in radeon_legacy_set_clock_gating()
812
tmp = RREG32_PLL(
RADEON_MCLK_CNTL
);
in radeon_legacy_set_clock_gating()
817
WREG32_PLL(
RADEON_MCLK_CNTL
, tmp);
in radeon_legacy_set_clock_gating()
882
tmp = RREG32_PLL(
RADEON_MCLK_CNTL
);
in radeon_legacy_set_clock_gating()
885
WREG32_PLL(
RADEON_MCLK_CNTL
, tmp);
in radeon_legacy_set_clock_gating()
H
A
D
radeon_combios.c
3158
(
RADEON_MCLK_CNTL
);
in combios_parse_pll_table()
3161
WREG32_PLL(
RADEON_MCLK_CNTL
,
in combios_parse_pll_table()
H
A
D
radeon_reg.h
1175
#define
RADEON_MCLK_CNTL
0x0012 /* PLL */
macro
Completed in 37 milliseconds