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Help
Searched
refs:PLL_PWR_ON
(Results
1 - 4
of
4
) sorted by relevance
/kernel/linux/linux-6.6/drivers/phy/mediatek/
H
A
D
phy-mtk-ufs.c
22
#define
PLL_PWR_ON
BIT(11)
macro
65
mtk_phy_set_bits(mmio + MP_GLB_DIG_8C,
PLL_PWR_ON
);
in ufs_mtk_phy_set_active()
116
mtk_phy_clear_bits(mmio + MP_GLB_DIG_8C,
PLL_PWR_ON
);
in ufs_mtk_phy_set_deep_hibern()
/kernel/linux/linux-5.10/drivers/phy/mediatek/
H
A
D
phy-mtk-ufs.c
19
#define
PLL_PWR_ON
BIT(11)
macro
96
mphy_set_bit(phy, MP_GLB_DIG_8C,
PLL_PWR_ON
);
in ufs_mtk_phy_set_active()
145
mphy_clr_bit(phy, MP_GLB_DIG_8C,
PLL_PWR_ON
);
in ufs_mtk_phy_set_deep_hibern()
/kernel/linux/linux-5.10/arch/arm/mach-bcm/
H
A
D
bcm63xx_pmb.c
20
#define
PLL_PWR_ON
BIT(8)
macro
/kernel/linux/linux-6.6/arch/arm/mach-bcm/
H
A
D
bcm63xx_pmb.c
20
#define
PLL_PWR_ON
BIT(8)
macro
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