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Searched refs:PLL_FRAC (Results 1 - 5 of 5) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/qcom/
H A Dclk-alpha-pll.c58 #define PLL_FRAC(p) ((p)->offset + (p)->regs[PLL_OFF_FRAC]) macro
1011 regmap_write(regmap, PLL_FRAC(pll), config->alpha); in clk_fabia_pll_configure()
1143 regmap_read(pll->clkr.regmap, PLL_FRAC(pll), &frac); in alpha_pll_fabia_recalc_rate()
1169 regmap_write(pll->clkr.regmap, PLL_FRAC(pll), a); in alpha_pll_fabia_set_rate()
/kernel/linux/linux-6.6/drivers/clk/qcom/
H A Dclk-alpha-pll.c61 #define PLL_FRAC(p) ((p)->offset + (p)->regs[PLL_OFF_FRAC]) macro
1165 clk_alpha_pll_write_config(regmap, PLL_FRAC(pll), config->alpha); in clk_fabia_pll_configure()
1290 regmap_read(pll->clkr.regmap, PLL_FRAC(pll), &frac); in alpha_pll_fabia_recalc_rate()
1329 regmap_write(pll->clkr.regmap, PLL_FRAC(pll), a); in alpha_pll_fabia_set_rate()
/kernel/linux/linux-5.10/drivers/net/ieee802154/
H A Dmcr20a.c88 static const u8 PLL_FRAC[16] = { variable
500 /* freqency = ((PLL_INT+64) + (PLL_FRAC/65536)) * 32 MHz */ in mcr20a_set_channel()
508 PLL_FRAC[channel - 11]); in mcr20a_set_channel()
/kernel/linux/linux-6.6/drivers/net/ieee802154/
H A Dmcr20a.c88 static const u8 PLL_FRAC[16] = { variable
500 /* freqency = ((PLL_INT+64) + (PLL_FRAC/65536)) * 32 MHz */ in mcr20a_set_channel()
508 PLL_FRAC[channel - 11]); in mcr20a_set_channel()
/kernel/linux/linux-6.6/drivers/gpu/drm/bridge/
H A Dchipone-icn6211.c83 #define PLL_FRAC(n) (0x66 + ((n) & 0x3)) /* 0..2 */ macro

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