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Searched refs:MSR_IA32_TSC (Results 1 - 20 of 20) sorted by relevance

/kernel/linux/linux-5.10/tools/testing/selftests/kvm/x86_64/
H A Dtsc_msrs_test.c3 * Tests for MSR_IA32_TSC and MSR_IA32_TSC_ADJUST.
34 GUEST_ASSERT_EQ(rounded_rdmsr(MSR_IA32_TSC), val); in guest_code()
37 /* Guest: writes to MSR_IA32_TSC affect both MSRs. */ in guest_code()
39 wrmsr(MSR_IA32_TSC, val); in guest_code()
40 GUEST_ASSERT_EQ(rounded_rdmsr(MSR_IA32_TSC), val); in guest_code()
47 GUEST_ASSERT_EQ(rounded_rdmsr(MSR_IA32_TSC), val); in guest_code()
52 GUEST_ASSERT_EQ(rounded_rdmsr(MSR_IA32_TSC), HOST_ADJUST + val); in guest_code()
62 GUEST_ASSERT_EQ(rounded_rdmsr(MSR_IA32_TSC), HOST_ADJUST + val); in guest_code()
66 * Guest: writes to MSR_IA32_TSC affect both MSRs, so the host-side in guest_code()
71 wrmsr(MSR_IA32_TSC, va in guest_code()
[all...]
H A Dvmx_tsc_adjust_test.c76 wrmsr(MSR_IA32_TSC, l1_tsc - TSC_ADJUST_VALUE); in l2_guest_code()
91 wrmsr(MSR_IA32_TSC, rdtsc() - TSC_ADJUST_VALUE); in l1_guest_code()
/kernel/linux/linux-6.6/tools/testing/selftests/kvm/x86_64/
H A Dtsc_msrs_test.c3 * Tests for MSR_IA32_TSC and MSR_IA32_TSC_ADJUST.
23 GUEST_ASSERT_EQ(rounded_rdmsr(MSR_IA32_TSC), val); in guest_code()
26 /* Guest: writes to MSR_IA32_TSC affect both MSRs. */ in guest_code()
28 wrmsr(MSR_IA32_TSC, val); in guest_code()
29 GUEST_ASSERT_EQ(rounded_rdmsr(MSR_IA32_TSC), val); in guest_code()
36 GUEST_ASSERT_EQ(rounded_rdmsr(MSR_IA32_TSC), val); in guest_code()
41 GUEST_ASSERT_EQ(rounded_rdmsr(MSR_IA32_TSC), HOST_ADJUST + val); in guest_code()
51 GUEST_ASSERT_EQ(rounded_rdmsr(MSR_IA32_TSC), HOST_ADJUST + val); in guest_code()
55 * Guest: writes to MSR_IA32_TSC affect both MSRs, so the host-side in guest_code()
60 wrmsr(MSR_IA32_TSC, va in guest_code()
[all...]
H A Dvmx_tsc_adjust_test.c68 wrmsr(MSR_IA32_TSC, l1_tsc - TSC_ADJUST_VALUE); in l2_guest_code()
83 wrmsr(MSR_IA32_TSC, rdtsc() - TSC_ADJUST_VALUE); in l1_guest_code()
H A Dvmx_nested_tsc_scaling_test.c65 tsc_start = rdmsr(MSR_IA32_TSC); in check_tsc_freq()
67 tsc_end = rdmsr(MSR_IA32_TSC); in check_tsc_freq()
H A Dtsc_scaling_sync.c57 vcpu_set_msr(vcpu, MSR_IA32_TSC, TEST_TSC_OFFSET); in run_vcpu()
/kernel/linux/linux-5.10/arch/x86/include/asm/
H A Dmsr.h327 #define write_tsc(low, high) wrmsr(MSR_IA32_TSC, (low), (high))
H A Dmsr-index.h679 #define MSR_IA32_TSC 0x00000010 macro
/kernel/linux/linux-5.10/tools/arch/x86/include/asm/
H A Dmsr-index.h645 #define MSR_IA32_TSC 0x00000010 macro
/kernel/linux/linux-6.6/arch/x86/include/asm/
H A Dmsr-index.h773 #define MSR_IA32_TSC 0x00000010 macro
/kernel/linux/linux-6.6/tools/arch/x86/include/asm/
H A Dmsr-index.h759 #define MSR_IA32_TSC 0x00000010 macro
/kernel/linux/linux-6.6/tools/testing/selftests/kvm/include/x86_64/
H A Dprocessor.h1045 return msr != MSR_IA32_TSC; in is_durable_msr()
/kernel/linux/linux-5.10/arch/x86/kvm/vmx/
H A Dnested.c944 if (msr_index == MSR_IA32_TSC) { in nested_vmx_get_vmexit_msr_value()
946 MSR_IA32_TSC); in nested_vmx_get_vmexit_msr_value()
2507 prepare_vmx_msr_autostore_list(&vmx->vcpu, MSR_IA32_TSC); in prepare_vmcs02_rare()
H A Dvmx.c158 MSR_IA32_TSC,
7078 vmx_disable_intercept_for_msr(vcpu, MSR_IA32_TSC, MSR_TYPE_R); in vmx_create_vcpu()
/kernel/linux/linux-6.6/arch/x86/kvm/vmx/
H A Dnested.c954 if (msr_index == MSR_IA32_TSC) { in nested_vmx_get_vmexit_msr_value()
956 MSR_IA32_TSC); in nested_vmx_get_vmexit_msr_value()
2513 prepare_vmx_msr_autostore_list(&vmx->vcpu, MSR_IA32_TSC); in prepare_vmcs02_rare()
H A Dvmx.c167 MSR_IA32_TSC,
7513 vmx_disable_intercept_for_msr(vcpu, MSR_IA32_TSC, MSR_TYPE_R); in vmx_vcpu_create()
/kernel/linux/linux-5.10/arch/x86/kvm/
H A Dx86.c1231 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
3241 case MSR_IA32_TSC: in kvm_set_msr_common()
3534 case MSR_IA32_TSC: { in kvm_get_msr_common()
3536 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset in kvm_get_msr_common()
H A Demulate.c3670 ctxt->ops->get_msr(ctxt, MSR_IA32_TSC, &tsc); in em_rdtsc()
/kernel/linux/linux-6.6/arch/x86/kvm/
H A Dx86.c1455 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
3782 case MSR_IA32_TSC: in kvm_set_msr_common()
4113 case MSR_IA32_TSC: { in kvm_get_msr_common()
4115 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset in kvm_get_msr_common()
H A Demulate.c3242 ctxt->ops->get_msr(ctxt, MSR_IA32_TSC, &tsc); in em_rdtsc()

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