| /kernel/uniproton/src/arch/cpu/armv7-m/cortex-m4/ |
| H A D | prt_vector.S | 51 @Enable USGFAULT, BUSFAULT, MEMFAULT
83 @Enable exception including USGFAULT, BUSFAULT, MEMFAULT
|
| /kernel/liteos_m/arch/arm/cortex-m3/keil/ |
| H A D | los_interrupt.c | 167 #define MEMFAULT (1 << 16)
macro
425 /* Enable USGFAULT, BUSFAULT, MEMFAULT */
in HalHwiInit()
426 *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
in HalHwiInit()
|
| /kernel/liteos_m/arch/arm/cortex-m33/gcc/NTZ/ |
| H A D | los_interrupt.c | 169 #define MEMFAULT (1 << 16)
macro
422 /* Enable USGFAULT, BUSFAULT, MEMFAULT */
in HalHwiInit()
423 *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
in HalHwiInit()
|
| /kernel/liteos_m/arch/arm/cortex-m33/gcc/TZ/non_secure/ |
| H A D | los_interrupt.c | 169 #define MEMFAULT (1 << 16)
macro
422 /* Enable USGFAULT, BUSFAULT, MEMFAULT */
in HalHwiInit()
423 *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
in HalHwiInit()
|
| /kernel/liteos_m/arch/arm/cortex-m33/iar/NTZ/ |
| H A D | los_interrupt.c | 170 #define MEMFAULT (1 << 16)
macro
427 /* Enable USGFAULT, BUSFAULT, MEMFAULT */
in HalHwiInit()
428 *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
in HalHwiInit()
|
| /kernel/liteos_m/arch/arm/cortex-m33/iar/TZ/non_secure/ |
| H A D | los_interrupt.c | 170 #define MEMFAULT (1 << 16)
macro
427 /* Enable USGFAULT, BUSFAULT, MEMFAULT */
in HalHwiInit()
428 *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
in HalHwiInit()
|
| /kernel/liteos_m/arch/arm/cortex-m4/gcc/ |
| H A D | los_interrupt.c | 168 #define MEMFAULT (1 << 16)
macro
436 /* Enable USGFAULT, BUSFAULT, MEMFAULT */
in HalHwiInit()
437 *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
in HalHwiInit()
|
| /kernel/liteos_m/arch/arm/cortex-m4/iar/ |
| H A D | los_interrupt.c | 168 #define MEMFAULT (1 << 16)
macro
426 /* Enable USGFAULT, BUSFAULT, MEMFAULT */
in HalHwiInit()
427 *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
in HalHwiInit()
|
| /kernel/liteos_m/arch/arm/cortex-m55/gcc/NTZ/ |
| H A D | los_interrupt.c | 168 #define MEMFAULT (1 << 16)
macro
430 /* Enable USGFAULT, BUSFAULT, MEMFAULT */
in HalHwiInit()
431 *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
in HalHwiInit()
|
| /kernel/liteos_m/arch/arm/cortex-m55/gcc/TZ/non_secure/ |
| H A D | los_interrupt.c | 169 #define MEMFAULT (1 << 16)
macro
422 /* Enable USGFAULT, BUSFAULT, MEMFAULT */
in HalHwiInit()
423 *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
in HalHwiInit()
|
| /kernel/liteos_m/arch/arm/cortex-m55/iar/NTZ/ |
| H A D | los_interrupt.c | 170 #define MEMFAULT (1 << 16)
macro
427 /* Enable USGFAULT, BUSFAULT, MEMFAULT */
in HalHwiInit()
428 *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
in HalHwiInit()
|
| /kernel/liteos_m/arch/arm/cortex-m55/iar/TZ/non_secure/ |
| H A D | los_interrupt.c | 171 #define MEMFAULT (1 << 16)
macro
423 /* Enable USGFAULT, BUSFAULT, MEMFAULT */
in HalHwiInit()
424 *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
in HalHwiInit()
|
| /kernel/liteos_m/arch/arm/cortex-m7/gcc/ |
| H A D | los_interrupt.c | 167 #define MEMFAULT (1 << 16)
macro
425 /* Enable USGFAULT, BUSFAULT, MEMFAULT */
in HalHwiInit()
426 *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
in HalHwiInit()
|
| /kernel/liteos_m/arch/arm/cortex-m7/iar/ |
| H A D | los_interrupt.c | 171 #define MEMFAULT (1 << 16)
macro
429 /* Enable USGFAULT, BUSFAULT, MEMFAULT */
in HalHwiInit()
430 *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
in HalHwiInit()
|