LEVEL0_MPLL_DIV_EN (reference) in projects: kernel - OpenGrok search results

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Searched refs:LEVEL0_MPLL_DIV_EN (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H A D	rv6xxd.h	`85 # define LEVEL0_MPLL_DIV_EN (1 << 28) macro`
H A D	rv6xx_dpm.c	`374 LEVEL0_MPLL_DIV_EN, ~LEVEL0_MPLL_DIV_EN); in rv6xx_memory_clock_entry_enable_post_divider() 376 WREG32_P(MPLL_FREQ_LEVEL_0 + (index * 4), 0, ~LEVEL0_MPLL_DIV_EN); in rv6xx_memory_clock_entry_enable_post_divider()`
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H A D	rv6xxd.h	`85 # define LEVEL0_MPLL_DIV_EN (1 << 28) macro`
H A D	rv6xx_dpm.c	`374 LEVEL0_MPLL_DIV_EN, ~LEVEL0_MPLL_DIV_EN); in rv6xx_memory_clock_entry_enable_post_divider() 376 WREG32_P(MPLL_FREQ_LEVEL_0 + (index * 4), 0, ~LEVEL0_MPLL_DIV_EN); in rv6xx_memory_clock_entry_enable_post_divider()`

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