Home
last modified time | relevance | path

Searched refs:IMX6SX_CLK_PLL5_VIDEO_DIV (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dimx6sx-clock.h43 #define IMX6SX_CLK_PLL5_VIDEO_DIV 34 macro
/kernel/linux/linux-5.10/include/dt-bindings/clock/
H A Dimx6sx-clock.h43 #define IMX6SX_CLK_PLL5_VIDEO_DIV 34 macro
/kernel/linux/linux-6.6/include/dt-bindings/clock/
H A Dimx6sx-clock.h43 #define IMX6SX_CLK_PLL5_VIDEO_DIV 34 macro
/kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dimx6sx-clock.h43 #define IMX6SX_CLK_PLL5_VIDEO_DIV 34 macro
/kernel/linux/linux-5.10/drivers/clk/imx/
H A Dclk-imx6sx.c253 hws[IMX6SX_CLK_PLL5_VIDEO_DIV] = clk_hw_register_divider_table(NULL, "pll5_video_div", "pll5_post_div", in imx6sx_clocks_init()
502 clk_set_parent(hws[IMX6SX_CLK_LCDIF1_PRE_SEL]->clk, hws[IMX6SX_CLK_PLL5_VIDEO_DIV]->clk); in imx6sx_clocks_init()
/kernel/linux/linux-6.6/drivers/clk/imx/
H A Dclk-imx6sx.c253 hws[IMX6SX_CLK_PLL5_VIDEO_DIV] = clk_hw_register_divider_table(NULL, "pll5_video_div", "pll5_post_div", in imx6sx_clocks_init()
502 clk_set_parent(hws[IMX6SX_CLK_LCDIF1_PRE_SEL]->clk, hws[IMX6SX_CLK_PLL5_VIDEO_DIV]->clk); in imx6sx_clocks_init()

Completed in 8 milliseconds