Searched refs:HCR_EL2 (Results 1 - 6 of 6) sorted by relevance
| /kernel/linux/linux-6.6/arch/arm64/kvm/ |
| H A D | emulate-nested.c | 115 .index = HCR_EL2,
121 .index = HCR_EL2,
127 .index = HCR_EL2,
133 .index = HCR_EL2,
139 .index = HCR_EL2,
145 .index = HCR_EL2,
151 .index = HCR_EL2,
157 .index = HCR_EL2,
163 .index = HCR_EL2,
169 .index = HCR_EL2,
[all...] |
| H A D | trace_arm.h | 327 __entry->hcr_el2 = __vcpu_sys_reg(vcpu, HCR_EL2);
357 __entry->hcr_el2 = __vcpu_sys_reg(vcpu, HCR_EL2);
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| H A D | handle_exit.c | 45 if (vcpu_read_sys_reg(vcpu, HCR_EL2) & HCR_HCD) in handle_hvc()
60 * trapped to EL2 because HCR_EL2.TSC is 1, the exception is a in handle_smc()
83 * at Non-secure EL1 is trapped to EL2 if HCR_EL2.TSC==1, rather than in handle_smc()
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| H A D | sys_regs.c | 1791 * HCR_EL2.E2H==1, and only in the sysreg table for convenience of
2366 EL2_REG(HCR_EL2, access_rw, reset_val, 0),
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| /kernel/linux/linux-6.6/arch/arm64/include/asm/ |
| H A D | kvm_emulate.h | 85 * For non-FWB CPUs, we trap VM ops (HCR_EL2.TVM) until M+C in vcpu_reset_hcr()
211 return ctxt_sys_reg(ctxt, HCR_EL2) & HCR_E2H; in __vcpu_el2_e2h_is_set()
221 return ctxt_sys_reg(ctxt, HCR_EL2) & HCR_TGE; in __vcpu_el2_tge_is_set()
236 * Note that the HCR_EL2.{E2H,TGE}={0,1} isn't really handled in the in __is_hyp_ctxt()
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| H A D | kvm_host.h | 379 HCR_EL2, /* Hypervisor Configuration Register */ enumerator
580 /* Virtual SError ESR to restore when HCR_EL2.VSE is set */
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