Searched refs:ESTAT (Results 1 - 10 of 10) sorted by relevance
| /kernel/linux/linux-5.10/drivers/net/ethernet/microchip/ |
| H A D | encx24j600.c | 250 estat = encx24j600_read_reg(priv, ESTAT); in encx24j600_wait_for_autoneg()
270 estat = encx24j600_read_reg(priv, ESTAT); in encx24j600_check_link_status()
435 packet_count = encx24j600_read_reg(priv, ESTAT) & 0xff; in encx24j600_isr()
438 packet_count = encx24j600_read_reg(priv, ESTAT) & 0xff; in encx24j600_isr()
473 while (!(encx24j600_read_reg(priv, ESTAT) & CLKRDY) && --timeout) in encx24j600_soft_reset()
560 pr_info(DRV_NAME " ESTAT: %04X\n", encx24j600_read_reg(priv, ESTAT)); in encx24j600_dump_config()
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| H A D | encx24j600_hw.h | 96 #define ESTAT 0x1A macro
162 /* ESTAT */
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| H A D | enc28j60_hw.h | 25 #define ESTAT 0x1D macro
143 /* ENC28J60 ESTAT Register Bit Definitions */
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| H A D | enc28j60.c | 199 /* These registers (EIE, EIR, ESTAT, ECON2, ECON1) in enc28j60_set_bank()
535 "Cntrl: ECON1 ECON2 ESTAT EIR EIE\n" in enc28j60_dump_regs()
546 nolock_regb_read(priv, ESTAT), nolock_regb_read(priv, EIR), in enc28j60_dump_regs()
637 poll_ready(priv, ESTAT, ESTAT_RXBUSY, 0); in enc28j60_lowpower()
643 poll_ready(priv, ESTAT, ESTAT_CLKRDY, ESTAT_CLKRDY); in enc28j60_lowpower()
1161 if (locked_regb_read(priv, ESTAT) & ESTAT_TXABRT) { in enc28j60_irq_work_handler()
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| H A D | encx24j600-regmap.c | 323 case ESTAT: in encx24j600_regmap_volatile()
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| /kernel/linux/linux-6.6/drivers/net/ethernet/microchip/ |
| H A D | encx24j600.c | 249 estat = encx24j600_read_reg(priv, ESTAT); in encx24j600_wait_for_autoneg()
269 estat = encx24j600_read_reg(priv, ESTAT); in encx24j600_check_link_status()
434 packet_count = encx24j600_read_reg(priv, ESTAT) & 0xff; in encx24j600_isr()
437 packet_count = encx24j600_read_reg(priv, ESTAT) & 0xff; in encx24j600_isr()
472 while (!(encx24j600_read_reg(priv, ESTAT) & CLKRDY) && --timeout) in encx24j600_soft_reset()
559 pr_info(DRV_NAME " ESTAT: %04X\n", encx24j600_read_reg(priv, ESTAT)); in encx24j600_dump_config()
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| H A D | encx24j600_hw.h | 96 #define ESTAT 0x1A macro
162 /* ESTAT */
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| H A D | enc28j60_hw.h | 25 #define ESTAT 0x1D macro
143 /* ENC28J60 ESTAT Register Bit Definitions */
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| H A D | enc28j60.c | 198 /* These registers (EIE, EIR, ESTAT, ECON2, ECON1) in enc28j60_set_bank()
534 "Cntrl: ECON1 ECON2 ESTAT EIR EIE\n" in enc28j60_dump_regs()
545 nolock_regb_read(priv, ESTAT), nolock_regb_read(priv, EIR), in enc28j60_dump_regs()
636 poll_ready(priv, ESTAT, ESTAT_RXBUSY, 0); in enc28j60_lowpower()
642 poll_ready(priv, ESTAT, ESTAT_CLKRDY, ESTAT_CLKRDY); in enc28j60_lowpower()
1159 if (locked_regb_read(priv, ESTAT) & ESTAT_TXABRT) { in enc28j60_irq()
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| H A D | encx24j600-regmap.c | 323 case ESTAT: in encx24j600_regmap_volatile()
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