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Searched refs:EFX_MAX_CHANNELS (Results 1 - 23 of 23) sorted by relevance

/kernel/linux/linux-5.10/drivers/net/ethernet/sfc/
H A Dselftest.h35 int eventq_dma[EFX_MAX_CHANNELS];
36 int eventq_int[EFX_MAX_CHANNELS];
H A Dnet_driver.h55 #define EFX_MAX_CHANNELS 32U macro
56 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS
65 #define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS)
72 #define EFX_MAX_TX_QUEUES (EFX_MAX_TXQ_PER_CHANNEL * EFX_MAX_CHANNELS)
1017 struct efx_channel *channel[EFX_MAX_CHANNELS];
1018 struct efx_msi_context msi_context[EFX_MAX_CHANNELS];
H A Def100_nic.h71 DECLARE_BITMAP(evq_phases, EFX_MAX_CHANNELS);
H A Defx_channels.c249 struct msix_entry xentries[EFX_MAX_CHANNELS]; in efx_probe_interrupts()
548 for (i = 0; i < EFX_MAX_CHANNELS; i++) { in efx_init_channels()
560 efx->max_channels = EFX_MAX_CHANNELS; in efx_init_channels()
561 efx->max_tx_channels = EFX_MAX_CHANNELS; in efx_init_channels()
570 for (i = 0; i < EFX_MAX_CHANNELS; i++) in efx_fini_channels()
749 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel, in efx_realloc_channels()
H A Dsiena.c279 efx->max_channels = EFX_MAX_CHANNELS; in siena_probe_nic()
280 efx->max_vis = EFX_MAX_CHANNELS; in siena_probe_nic()
281 efx->max_tx_channels = EFX_MAX_CHANNELS; in siena_probe_nic()
H A Dselftest.c177 unsigned int read_ptr[EFX_MAX_CHANNELS]; in efx_test_eventq_irq()
181 BUILD_BUG_ON(EFX_MAX_CHANNELS > BITS_PER_LONG); in efx_test_eventq_irq()
H A Dmcdi.c2037 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS)); in efx_mcdi_flush_rxqs()
2040 BUILD_BUG_ON(EFX_MAX_CHANNELS > in efx_mcdi_flush_rxqs()
H A Dsiena_sriov.c1294 BUILD_BUG_ON(EFX_MAX_CHANNELS + 1 >= EFX_VI_BASE); in efx_siena_sriov_init()
H A Def10.c618 efx->max_channels = min_t(unsigned int, EFX_MAX_CHANNELS, in efx_ef10_probe()
/kernel/linux/linux-6.6/drivers/net/ethernet/sfc/
H A Dselftest.h35 int eventq_dma[EFX_MAX_CHANNELS];
36 int eventq_int[EFX_MAX_CHANNELS];
H A Dnet_driver.h56 #define EFX_MAX_CHANNELS 32U macro
57 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS
67 #define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS)
72 #define EFX_MAX_TX_QUEUES (EFX_MAX_TXQ_PER_CHANNEL * EFX_MAX_CHANNELS)
1010 struct efx_channel *channel[EFX_MAX_CHANNELS];
1011 struct efx_msi_context msi_context[EFX_MAX_CHANNELS];
H A Def100_nic.h73 DECLARE_BITMAP(evq_phases, EFX_MAX_CHANNELS);
H A Defx_channels.c260 struct msix_entry xentries[EFX_MAX_CHANNELS]; in efx_probe_interrupts()
568 for (i = 0; i < EFX_MAX_CHANNELS; i++) { in efx_init_channels()
580 efx->max_channels = EFX_MAX_CHANNELS; in efx_init_channels()
581 efx->max_tx_channels = EFX_MAX_CHANNELS; in efx_init_channels()
590 for (i = 0; i < EFX_MAX_CHANNELS; i++) in efx_fini_channels()
846 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel, in efx_realloc_channels()
H A Dselftest.c181 unsigned int read_ptr[EFX_MAX_CHANNELS]; in efx_test_eventq_irq()
185 BUILD_BUG_ON(EFX_MAX_CHANNELS > BITS_PER_LONG); in efx_test_eventq_irq()
H A Dmcdi.c2029 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS)); in efx_mcdi_flush_rxqs()
2032 BUILD_BUG_ON(EFX_MAX_CHANNELS > in efx_mcdi_flush_rxqs()
H A Def10.c617 efx->max_channels = min_t(unsigned int, EFX_MAX_CHANNELS, in efx_ef10_probe()
/kernel/linux/linux-6.6/drivers/net/ethernet/sfc/siena/
H A Dselftest.h35 int eventq_dma[EFX_MAX_CHANNELS];
36 int eventq_int[EFX_MAX_CHANNELS];
H A Dnet_driver.h55 #define EFX_MAX_CHANNELS 32U macro
56 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS
65 #define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS)
72 #define EFX_MAX_TX_QUEUES (EFX_MAX_TXQ_PER_CHANNEL * EFX_MAX_CHANNELS)
976 struct efx_channel *channel[EFX_MAX_CHANNELS];
977 struct efx_msi_context msi_context[EFX_MAX_CHANNELS];
H A Defx_channels.c261 struct msix_entry xentries[EFX_MAX_CHANNELS]; in efx_siena_probe_interrupts()
570 for (i = 0; i < EFX_MAX_CHANNELS; i++) { in efx_siena_init_channels()
582 efx->max_channels = EFX_MAX_CHANNELS; in efx_siena_init_channels()
583 efx->max_tx_channels = EFX_MAX_CHANNELS; in efx_siena_init_channels()
592 for (i = 0; i < EFX_MAX_CHANNELS; i++) in efx_siena_fini_channels()
858 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel; in efx_siena_realloc_channels()
H A Dsiena.c282 efx->max_channels = EFX_MAX_CHANNELS; in siena_probe_nic()
283 efx->max_vis = EFX_MAX_CHANNELS; in siena_probe_nic()
284 efx->max_tx_channels = EFX_MAX_CHANNELS; in siena_probe_nic()
H A Dselftest.c182 unsigned int read_ptr[EFX_MAX_CHANNELS]; in efx_test_eventq_irq()
186 BUILD_BUG_ON(EFX_MAX_CHANNELS > BITS_PER_LONG); in efx_test_eventq_irq()
H A Dmcdi.c1981 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS)); in efx_siena_mcdi_flush_rxqs()
1984 BUILD_BUG_ON(EFX_MAX_CHANNELS > in efx_siena_mcdi_flush_rxqs()
H A Dsiena_sriov.c1295 BUILD_BUG_ON(EFX_MAX_CHANNELS + 1 >= EFX_VI_BASE); in efx_siena_sriov_init()

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