DPLL_FPA01_P1_POST_DIV_SHIFT (reference) in projects: kernel - OpenGrok search results

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Searched refs:DPLL_FPA01_P1_POST_DIV_SHIFT (Results 1 - 11 of 11) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/gma500/
H A D	psb_intel_display.c	`338 DPLL_FPA01_P1_POST_DIV_SHIFT); in psb_intel_crtc_clock_get() 354 DPLL_FPA01_P1_POST_DIV_SHIFT) + 2; in psb_intel_crtc_clock_get()`
H A D	cdv_intel_display.c	`878 DPLL_FPA01_P1_POST_DIV_SHIFT); in cdv_intel_crtc_clock_get() 898 DPLL_FPA01_P1_POST_DIV_SHIFT) + 2; in cdv_intel_crtc_clock_get()`
H A D	psb_intel_reg.h	`254 #define DPLL_FPA01_P1_POST_DIV_SHIFT 16 macro`
/kernel/linux/linux-6.6/drivers/gpu/drm/gma500/
H A D	psb_intel_display.c	`344 DPLL_FPA01_P1_POST_DIV_SHIFT); in psb_intel_crtc_clock_get() 360 DPLL_FPA01_P1_POST_DIV_SHIFT) + 2; in psb_intel_crtc_clock_get()`
H A D	cdv_intel_display.c	`875 DPLL_FPA01_P1_POST_DIV_SHIFT); in cdv_intel_crtc_clock_get() 895 DPLL_FPA01_P1_POST_DIV_SHIFT) + 2; in cdv_intel_crtc_clock_get()`
H A D	psb_intel_reg.h	`254 #define DPLL_FPA01_P1_POST_DIV_SHIFT 16 macro`
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
H A D	intel_dpll.c	`838 dpll \|= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT; in i9xx_compute_dpll() 844 dpll \|= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT; in i9xx_compute_dpll() 898 dpll \|= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT; in i8xx_compute_dpll() 903 dpll \|= (clock->p1 - 2) << DPLL_FPA01_P1_POST_DIV_SHIFT; in i8xx_compute_dpll() 1109 dpll \|= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT; in ilk_compute_dpll()`
H A D	intel_display.c	`3866 DPLL_FPA01_P1_POST_DIV_SHIFT); in i9xx_crtc_clock_get() 3897 DPLL_FPA01_P1_POST_DIV_SHIFT); in i9xx_crtc_clock_get() 3908 DPLL_FPA01_P1_POST_DIV_SHIFT) + 2; in i9xx_crtc_clock_get() 7904 ((clock.p1 - 2) << DPLL_FPA01_P1_POST_DIV_SHIFT) \| in i830_enable_pipe()`
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
H A D	intel_display.c	8719 dpll \|= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT; in i9xx_compute_dpll() 8772 dpll \|= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT; in i8xx_compute_dpll() 8777 dpll \|= (clock->p1 - 2) << DPLL_FPA01_P1_POST_DIV_SHIFT; in i8xx_compute_dpll() 10322 dpll \|= (1 << (crtc_state->dpll.p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT; in ilk_compute_dpll() 12166 DPLL_FPA01_P1_POST_DIV_SHIFT); in i9xx_crtc_clock_get() 12195 DPLL_FPA01_P1_POST_DIV_SHIFT); in i9xx_crtc_clock_get() 12206 DPLL_FPA01_P1_POST_DIV_SHIFT) + 2; in i9xx_crtc_clock_get() 18085 ((clock.p1 - 2) << DPLL_FPA01_P1_POST_DIV_SHIFT) \| in i830_enable_pipe()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/
H A D	i915_reg.h	`1478 #define DPLL_FPA01_P1_POST_DIV_SHIFT 16 macro`
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
H A D	i915_reg.h	`3482 #define DPLL_FPA01_P1_POST_DIV_SHIFT 16 macro`

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