/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/ |
H A D | display.c | 214 vgpu_vreg_t(vgpu, DDI_BUF_CTL(port)) &= in emulate_monitor_status_change() 217 vgpu_vreg_t(vgpu, DDI_BUF_CTL(port)) |= DDI_BUF_IS_IDLE; in emulate_monitor_status_change() 277 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) |= in emulate_monitor_status_change() 279 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) &= in emulate_monitor_status_change() 306 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) |= in emulate_monitor_status_change() 308 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) &= in emulate_monitor_status_change() 336 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) |= in emulate_monitor_status_change() 338 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) &= in emulate_monitor_status_change() 417 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) |= DDI_BUF_CTL_ENABLE; in emulate_monitor_status_change() 418 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_ in emulate_monitor_status_change() [all...] |
H A D | handlers.c | 551 if (offset == i915_mmio_reg_offset(DDI_BUF_CTL(PORT_E))) in ddi_buf_ctl_mmio_write() 570 u32 ddi_buf_ctl = vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_E)); in fdi_auto_training_started() 2523 MMIO_DH(DDI_BUF_CTL(PORT_A), D_ALL, NULL, ddi_buf_ctl_mmio_write); in init_generic_mmio_info() 2524 MMIO_DH(DDI_BUF_CTL(PORT_B), D_ALL, NULL, ddi_buf_ctl_mmio_write); in init_generic_mmio_info() 2525 MMIO_DH(DDI_BUF_CTL(PORT_C), D_ALL, NULL, ddi_buf_ctl_mmio_write); in init_generic_mmio_info() 2526 MMIO_DH(DDI_BUF_CTL(PORT_D), D_ALL, NULL, ddi_buf_ctl_mmio_write); in init_generic_mmio_info() 2527 MMIO_DH(DDI_BUF_CTL(PORT_E), D_ALL, NULL, ddi_buf_ctl_mmio_write); in init_generic_mmio_info()
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/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gvt/ |
H A D | display.c | 219 vgpu_vreg_t(vgpu, DDI_BUF_CTL(port)) &= in emulate_monitor_status_change() 222 vgpu_vreg_t(vgpu, DDI_BUF_CTL(port)) |= DDI_BUF_IS_IDLE; in emulate_monitor_status_change() 282 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) |= in emulate_monitor_status_change() 284 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) &= in emulate_monitor_status_change() 311 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) |= in emulate_monitor_status_change() 313 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) &= in emulate_monitor_status_change() 341 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) |= in emulate_monitor_status_change() 343 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) &= in emulate_monitor_status_change() 422 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) |= DDI_BUF_CTL_ENABLE; in emulate_monitor_status_change() 423 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_ in emulate_monitor_status_change() [all...] |
H A D | handlers.c | 802 if (offset == i915_mmio_reg_offset(DDI_BUF_CTL(PORT_E))) in ddi_buf_ctl_mmio_write() 821 u32 ddi_buf_ctl = vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_E)); in fdi_auto_training_started() 2342 MMIO_DH(DDI_BUF_CTL(PORT_A), D_ALL, NULL, ddi_buf_ctl_mmio_write); in init_generic_mmio_info() 2343 MMIO_DH(DDI_BUF_CTL(PORT_B), D_ALL, NULL, ddi_buf_ctl_mmio_write); in init_generic_mmio_info() 2344 MMIO_DH(DDI_BUF_CTL(PORT_C), D_ALL, NULL, ddi_buf_ctl_mmio_write); in init_generic_mmio_info() 2345 MMIO_DH(DDI_BUF_CTL(PORT_D), D_ALL, NULL, ddi_buf_ctl_mmio_write); in init_generic_mmio_info() 2346 MMIO_DH(DDI_BUF_CTL(PORT_E), D_ALL, NULL, ddi_buf_ctl_mmio_write); in init_generic_mmio_info()
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/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
H A D | intel_fdi.c | 797 /* Configure and enable DDI_BUF_CTL for DDI E with next voltage. in hsw_fdi_link_train() 801 intel_de_write(dev_priv, DDI_BUF_CTL(PORT_E), in hsw_fdi_link_train() 803 intel_de_posting_read(dev_priv, DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train() 846 intel_de_rmw(dev_priv, DDI_BUF_CTL(PORT_E), DDI_BUF_CTL_ENABLE, 0); in hsw_fdi_link_train() 847 intel_de_posting_read(dev_priv, DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train() 875 * Bspec lists this as both step 13 (before DDI_BUF_CTL disable) in hsw_fdi_disable() 881 intel_de_rmw(dev_priv, DDI_BUF_CTL(PORT_E), DDI_BUF_CTL_ENABLE, 0); in hsw_fdi_disable()
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H A D | intel_ddi.c | 195 if (wait_for_us((intel_de_read(dev_priv, DDI_BUF_CTL(port)) & in intel_wait_ddi_buf_idle() 208 /* Wait > 518 usecs for DDI_BUF_CTL to be non idle */ in intel_wait_ddi_buf_active() 231 ret = _wait_for(!(intel_de_read(dev_priv, DDI_BUF_CTL(port)) & DDI_BUF_IS_IDLE), in intel_wait_ddi_buf_active() 776 tmp = intel_de_read(dev_priv, DDI_BUF_CTL(port)); in intel_ddi_get_encoder_pipes() 1473 intel_de_write(dev_priv, DDI_BUF_CTL(port), intel_dp->DP); in hsw_set_signal_levels() 1474 intel_de_posting_read(dev_priv, DDI_BUF_CTL(port)); in hsw_set_signal_levels() 2831 val = intel_de_read(dev_priv, DDI_BUF_CTL(port)); in mtl_disable_ddi_buf() 2834 intel_de_write(dev_priv, DDI_BUF_CTL(port), val); in mtl_disable_ddi_buf() 2858 val = intel_de_read(dev_priv, DDI_BUF_CTL(port)); in disable_ddi_buf() 2861 intel_de_write(dev_priv, DDI_BUF_CTL(por in disable_ddi_buf() [all...] |
H A D | icl_dsi.c | 513 intel_de_rmw(dev_priv, DDI_BUF_CTL(port), 0, DDI_BUF_CTL_ENABLE); in gen11_dsi_enable_ddi_buffer() 515 if (wait_for_us(!(intel_de_read(dev_priv, DDI_BUF_CTL(port)) & in gen11_dsi_enable_ddi_buffer() 1351 intel_de_rmw(dev_priv, DDI_BUF_CTL(port), DDI_BUF_CTL_ENABLE, 0); in gen11_dsi_disable_port() 1353 if (wait_for_us((intel_de_read(dev_priv, DDI_BUF_CTL(port)) & in gen11_dsi_disable_port()
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H A D | intel_tc.c | 796 intel_de_rmw(i915, DDI_BUF_CTL(port), DDI_BUF_CTL_TC_PHY_OWNERSHIP, in adlp_tc_phy_take_ownership() 810 val = intel_de_read(i915, DDI_BUF_CTL(port)); in adlp_tc_phy_is_owned() 1413 return intel_de_read(i915, DDI_BUF_CTL(dig_port->base.port)) & in tc_port_is_enabled()
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H A D | intel_display.c | 7402 if (intel_de_read(dev_priv, DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES) in intel_ddi_crt_present()
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/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/ |
H A D | intel_ddi.c | 1294 if (wait_for_us((intel_de_read(dev_priv, DDI_BUF_CTL(port)) & in intel_wait_ddi_buf_idle() 1303 /* Wait > 518 usecs for DDI_BUF_CTL to be non idle */ in intel_wait_ddi_buf_active() 1309 if (wait_for_us(!(intel_de_read(dev_priv, DDI_BUF_CTL(port)) & in intel_wait_ddi_buf_active() 1430 /* Configure and enable DDI_BUF_CTL for DDI E with next voltage. in hsw_fdi_link_train() 1434 intel_de_write(dev_priv, DDI_BUF_CTL(PORT_E), in hsw_fdi_link_train() 1436 intel_de_posting_read(dev_priv, DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train() 1480 temp = intel_de_read(dev_priv, DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train() 1482 intel_de_write(dev_priv, DDI_BUF_CTL(PORT_E), temp); in hsw_fdi_link_train() 1483 intel_de_posting_read(dev_priv, DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train() 1958 tmp = intel_de_read(dev_priv, DDI_BUF_CTL(por in intel_ddi_get_encoder_pipes() [all...] |
H A D | icl_dsi.c | 511 tmp = intel_de_read(dev_priv, DDI_BUF_CTL(port)); in gen11_dsi_enable_ddi_buffer() 513 intel_de_write(dev_priv, DDI_BUF_CTL(port), tmp); in gen11_dsi_enable_ddi_buffer() 515 if (wait_for_us(!(intel_de_read(dev_priv, DDI_BUF_CTL(port)) & in gen11_dsi_enable_ddi_buffer() 1307 tmp = intel_de_read(dev_priv, DDI_BUF_CTL(port)); in gen11_dsi_disable_port() 1309 intel_de_write(dev_priv, DDI_BUF_CTL(port), tmp); in gen11_dsi_disable_port() 1311 if (wait_for_us((intel_de_read(dev_priv, DDI_BUF_CTL(port)) & in gen11_dsi_disable_port()
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H A D | intel_display.c | 16840 if (intel_de_read(dev_priv, DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES) in intel_ddi_crt_present() 16954 found = intel_de_read(dev_priv, DDI_BUF_CTL(PORT_A)) & DDI_INIT_DISPLAY_DETECTED; in intel_setup_outputs()
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/kernel/linux/linux-6.6/drivers/gpu/drm/i915/ |
H A D | intel_gvt_mmio_table.c | 513 MMIO_D(DDI_BUF_CTL(PORT_A)); in iterate_generic_mmio() 514 MMIO_D(DDI_BUF_CTL(PORT_B)); in iterate_generic_mmio() 515 MMIO_D(DDI_BUF_CTL(PORT_C)); in iterate_generic_mmio() 516 MMIO_D(DDI_BUF_CTL(PORT_D)); in iterate_generic_mmio() 517 MMIO_D(DDI_BUF_CTL(PORT_E)); in iterate_generic_mmio()
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H A D | i915_reg.h | 5725 #define DDI_BUF_CTL(port) _MMIO_PORT(port, _DDI_BUF_CTL_A, _DDI_BUF_CTL_B) macro
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/kernel/linux/linux-5.10/drivers/gpu/drm/i915/ |
H A D | i915_reg.h | 10008 #define DDI_BUF_CTL(port) _MMIO_PORT(port, _DDI_BUF_CTL_A, _DDI_BUF_CTL_B) macro
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