| /kernel/linux/linux-5.10/drivers/rtc/ |
| H A D | rtc-imxdi.c | 42 #define DCR 0x10 /* Control Reg */ macro
250 dcr = readl(imxdi->ioaddr + DCR); in di_handle_failure_state()
289 di_write_busy_wait(imxdi, DCR_TDCSL, DCR); in di_handle_invalid_state()
298 * - the TCHL or TCSL bit is set in DCR in di_handle_invalid_state()
300 dcr = readl(imxdi->ioaddr + DCR); in di_handle_invalid_state()
318 * - its TCE (DCR) is cleared in di_handle_invalid_state()
328 di_write_busy_wait(imxdi, dcr | DCR_TCE, DCR); in di_handle_invalid_state()
347 dcr = __raw_readl(imxdi->ioaddr + DCR); in di_handle_invalid_and_failure_state()
560 dcr = readl(imxdi->ioaddr + DCR); in dryice_rtc_set_time()
585 return di_write_wait(imxdi, readl(imxdi->ioaddr + DCR) | DCR_TC in dryice_rtc_set_time()
[all...] |
| /kernel/linux/linux-6.6/drivers/rtc/ |
| H A D | rtc-imxdi.c | 43 #define DCR 0x10 /* Control Reg */ macro
251 dcr = readl(imxdi->ioaddr + DCR); in di_handle_failure_state()
290 di_write_busy_wait(imxdi, DCR_TDCSL, DCR); in di_handle_invalid_state()
299 * - the TCHL or TCSL bit is set in DCR in di_handle_invalid_state()
301 dcr = readl(imxdi->ioaddr + DCR); in di_handle_invalid_state()
319 * - its TCE (DCR) is cleared in di_handle_invalid_state()
329 di_write_busy_wait(imxdi, dcr | DCR_TCE, DCR); in di_handle_invalid_state()
348 dcr = __raw_readl(imxdi->ioaddr + DCR); in di_handle_invalid_and_failure_state()
561 dcr = readl(imxdi->ioaddr + DCR); in dryice_rtc_set_time()
586 return di_write_wait(imxdi, readl(imxdi->ioaddr + DCR) | DCR_TC in dryice_rtc_set_time()
[all...] |
| /kernel/linux/linux-5.10/drivers/net/wan/ |
| H A D | hd64570.h | 142 #define DCR 0x15 /* DMA Command */ macro
143 #define DCR_RX(node) (DCR + (node ? DMAC1RX_OFFSET : DMAC0RX_OFFSET))
144 #define DCR_TX(node) (DCR + (node ? DMAC1TX_OFFSET : DMAC0TX_OFFSET))
|
| /kernel/linux/linux-6.6/drivers/net/wan/ |
| H A D | hd64570.h | 142 #define DCR 0x15 /* DMA Command */ macro
143 #define DCR_RX(node) (DCR + (node ? DMAC1RX_OFFSET : DMAC0RX_OFFSET))
144 #define DCR_TX(node) (DCR + (node ? DMAC1TX_OFFSET : DMAC0TX_OFFSET))
|
| /kernel/linux/linux-5.10/drivers/watchdog/ |
| H A D | ie6xx_wdt.c | 37 #define DCR 0x14 macro
191 seq_printf(s, "DCR = 0x%08x\n", in ie6xx_wdt_show()
192 inl(ie6xx_wdt_data.sch_wdtba + DCR)); in ie6xx_wdt_show()
|
| /kernel/linux/linux-6.6/drivers/watchdog/ |
| H A D | ie6xx_wdt.c | 37 #define DCR 0x14 macro
191 seq_printf(s, "DCR = 0x%08x\n", in ie6xx_wdt_show()
192 inl(ie6xx_wdt_data.sch_wdtba + DCR)); in ie6xx_wdt_show()
|
| /kernel/linux/linux-6.6/drivers/acpi/nfit/ |
| H A D | nfit.h | 279 DCR, enumerator
|
| /kernel/linux/linux-5.10/drivers/acpi/nfit/ |
| H A D | nfit.h | 285 DCR, enumerator
|
| H A D | core.c | 1020 dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n", in nfit_mem_find_spa_bdw()
1163 dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n", in __nfit_mem_init()
1187 * any SPA-DCR range. in __nfit_mem_init()
1220 * For each SPA-DCR or SPA-PMEM address range find its in nfit_mem_init()
1222 * corresponding DCR. Then, if we're operating on a SPA-DCR, in nfit_mem_init()
1224 * the DCR. Throw it all into an nfit_mem object. Note, that in nfit_mem_init()
2383 dev_err(dev, "%s: failed to find DCR\n", __func__); in acpi_nfit_init_interleave_set()
2458 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; in read_blk_stat()
2472 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; in write_blk_ctl()
[all...] |
| /kernel/linux/linux-5.10/include/trace/events/ |
| H A D | kvm.h | 16 ERSN(TPR_ACCESS), ERSN(S390_SIEIC), ERSN(S390_RESET), ERSN(DCR),\
|
| /kernel/linux/linux-6.6/include/trace/events/ |
| H A D | kvm.h | 16 ERSN(TPR_ACCESS), ERSN(S390_SIEIC), ERSN(S390_RESET), ERSN(DCR),\
|
| /kernel/linux/linux-6.6/tools/testing/selftests/kvm/lib/ |
| H A D | kvm_util.c | 1866 KVM_EXIT_STRING(DCR),
|
| /kernel/linux/linux-5.10/drivers/tty/ |
| H A D | synclink.c | 375 #define DCR 0x06 /* DMA Control Register (shared) */ macro
4892 /* DMA Control Register (DCR) in usc_set_sdlc_mode()
4898 * <13> 1 Enable Priority Preempt per DCR<15..14> in usc_set_sdlc_mode()
4899 * (WARNING DCR<11..10> must be 00 when this is 1) in usc_set_sdlc_mode()
4900 * 0 Choose activate channel per DCR<11..10> in usc_set_sdlc_mode()
4915 usc_OutDmaReg( info, DCR, 0xa00b ); in usc_set_sdlc_mode()
|