Searched refs:CSR0_INIT (Results 1 - 9 of 9) sorted by relevance
| /kernel/linux/linux-5.10/drivers/net/ethernet/amd/ |
| H A D | sun3lance.c | 212 #define CSR0_INIT 0x0001 /* initialize (RS) */ macro
333 ioaddr_probe[0] = CSR0_INIT | CSR0_STOP; in lance_probe()
430 REGA(CSR0) = CSR0_INIT; in lance_open()
561 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT; in lance_start_xmit()
589 if(!(DREG & CSR0_INIT)) { in lance_start_xmit()
593 REGA( CSR0 ) = CSR0_INIT | CSR0_STRT; in lance_start_xmit()
|
| H A D | atarilance.c | 312 #define CSR0_INIT 0x0001 /* initialize (RS) */ macro
506 /* The CSR0_INIT bit should not be readable */ in lance_probe1()
510 ioaddr[0] = CSR0_INIT | CSR0_STOP; in lance_probe1()
655 REGA( CSR0 ) = CSR0_INIT; in lance_open()
766 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT; in lance_tx_timeout()
873 DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP | in lance_interrupt()
|
| H A D | ni65.h | 34 #define CSR0_INIT 0x0001 /* Initialize (RS) */ macro
|
| H A D | am79c961a.h | 28 #define CSR0_INIT 0x0001 macro
|
| H A D | ni65.c | 535 writereg(CSR0_INIT|CSR0_INEA,CSR0); /* trigger interrupt */ in ni65_probe1()
590 writereg(CSR0_INIT,CSR0); /* this changes L_ADDRREG to CSR0 */ in ni65_init_lance()
|
| H A D | pcnet32.c | 193 #define CSR0_INIT 0x1 macro
1922 a->write_csr(ioaddr, CSR0, CSR0_INTEN | CSR0_INIT); in pcnet32_probe1()
2266 lp->a->write_csr(ioaddr, CSR0, CSR0_INIT); in pcnet32_open()
2431 lp->a->write_csr(ioaddr, CSR0, CSR0_INIT); in pcnet32_restart()
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/amd/ |
| H A D | sun3lance.c | 212 #define CSR0_INIT 0x0001 /* initialize (RS) */ macro
328 ioaddr_probe[0] = CSR0_INIT | CSR0_STOP; in lance_probe()
424 REGA(CSR0) = CSR0_INIT; in lance_open()
555 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT; in lance_start_xmit()
583 if(!(DREG & CSR0_INIT)) { in lance_start_xmit()
587 REGA( CSR0 ) = CSR0_INIT | CSR0_STRT; in lance_start_xmit()
|
| H A D | atarilance.c | 312 #define CSR0_INIT 0x0001 /* initialize (RS) */ macro
503 /* The CSR0_INIT bit should not be readable */ in lance_probe1()
507 ioaddr[0] = CSR0_INIT | CSR0_STOP; in lance_probe1()
654 REGA( CSR0 ) = CSR0_INIT; in lance_open()
765 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT; in lance_tx_timeout()
872 DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP | in lance_interrupt()
|
| H A D | pcnet32.c | 193 #define CSR0_INIT 0x1 macro
1932 a->write_csr(ioaddr, CSR0, CSR0_INTEN | CSR0_INIT); in pcnet32_probe1()
2276 lp->a->write_csr(ioaddr, CSR0, CSR0_INIT); in pcnet32_open()
2441 lp->a->write_csr(ioaddr, CSR0, CSR0_INIT); in pcnet32_restart()
|
Completed in 18 milliseconds