18c2ecf20Sopenharmony_ci/* atarilance.c: Ethernet driver for VME Lance cards on the Atari */
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci	Written 1995/96 by Roman Hodek (Roman.Hodek@informatik.uni-erlangen.de)
48c2ecf20Sopenharmony_ci
58c2ecf20Sopenharmony_ci	This software may be used and distributed according to the terms
68c2ecf20Sopenharmony_ci	of the GNU General Public License, incorporated herein by reference.
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_ci	This drivers was written with the following sources of reference:
98c2ecf20Sopenharmony_ci	 - The driver for the Riebl Lance card by the TU Vienna.
108c2ecf20Sopenharmony_ci	 - The modified TUW driver for PAM's VME cards
118c2ecf20Sopenharmony_ci	 - The PC-Linux driver for Lance cards (but this is for bus master
128c2ecf20Sopenharmony_ci       cards, not the shared memory ones)
138c2ecf20Sopenharmony_ci	 - The Amiga Ariadne driver
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_ci	v1.0: (in 1.2.13pl4/0.9.13)
168c2ecf20Sopenharmony_ci	      Initial version
178c2ecf20Sopenharmony_ci	v1.1: (in 1.2.13pl5)
188c2ecf20Sopenharmony_ci	      more comments
198c2ecf20Sopenharmony_ci		  deleted some debugging stuff
208c2ecf20Sopenharmony_ci		  optimized register access (keep AREG pointing to CSR0)
218c2ecf20Sopenharmony_ci		  following AMD, CSR0_STRT should be set only after IDON is detected
228c2ecf20Sopenharmony_ci		  use memcpy() for data transfers, that also employs long word moves
238c2ecf20Sopenharmony_ci		  better probe procedure for 24-bit systems
248c2ecf20Sopenharmony_ci          non-VME-RieblCards need extra delays in memcpy
258c2ecf20Sopenharmony_ci		  must also do write test, since 0xfxe00000 may hit ROM
268c2ecf20Sopenharmony_ci		  use 8/32 tx/rx buffers, which should give better NFS performance;
278c2ecf20Sopenharmony_ci		    this is made possible by shifting the last packet buffer after the
288c2ecf20Sopenharmony_ci		    RieblCard reserved area
298c2ecf20Sopenharmony_ci    v1.2: (in 1.2.13pl8)
308c2ecf20Sopenharmony_ci	      again fixed probing for the Falcon; 0xfe01000 hits phys. 0x00010000
318c2ecf20Sopenharmony_ci		  and thus RAM, in case of no Lance found all memory contents have to
328c2ecf20Sopenharmony_ci		  be restored!
338c2ecf20Sopenharmony_ci		  Now possible to compile as module.
348c2ecf20Sopenharmony_ci	v1.3: 03/30/96 Jes Sorensen, Roman (in 1.3)
358c2ecf20Sopenharmony_ci	      Several little 1.3 adaptions
368c2ecf20Sopenharmony_ci		  When the lance is stopped it jumps back into little-endian
378c2ecf20Sopenharmony_ci		  mode. It is therefore necessary to put it back where it
388c2ecf20Sopenharmony_ci		  belongs, in big endian mode, in order to make things work.
398c2ecf20Sopenharmony_ci		  This might be the reason why multicast-mode didn't work
408c2ecf20Sopenharmony_ci		  before, but I'm not able to test it as I only got an Amiga
418c2ecf20Sopenharmony_ci		  (we had similar problems with the A2065 driver).
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci*/
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_cistatic const char version[] = "atarilance.c: v1.3 04/04/96 "
468c2ecf20Sopenharmony_ci			      "Roman.Hodek@informatik.uni-erlangen.de\n";
478c2ecf20Sopenharmony_ci
488c2ecf20Sopenharmony_ci#include <linux/netdevice.h>
498c2ecf20Sopenharmony_ci#include <linux/etherdevice.h>
508c2ecf20Sopenharmony_ci#include <linux/module.h>
518c2ecf20Sopenharmony_ci#include <linux/stddef.h>
528c2ecf20Sopenharmony_ci#include <linux/kernel.h>
538c2ecf20Sopenharmony_ci#include <linux/string.h>
548c2ecf20Sopenharmony_ci#include <linux/errno.h>
558c2ecf20Sopenharmony_ci#include <linux/skbuff.h>
568c2ecf20Sopenharmony_ci#include <linux/interrupt.h>
578c2ecf20Sopenharmony_ci#include <linux/init.h>
588c2ecf20Sopenharmony_ci#include <linux/bitops.h>
598c2ecf20Sopenharmony_ci
608c2ecf20Sopenharmony_ci#include <asm/setup.h>
618c2ecf20Sopenharmony_ci#include <asm/irq.h>
628c2ecf20Sopenharmony_ci#include <asm/atarihw.h>
638c2ecf20Sopenharmony_ci#include <asm/atariints.h>
648c2ecf20Sopenharmony_ci#include <asm/io.h>
658c2ecf20Sopenharmony_ci
668c2ecf20Sopenharmony_ci/* Debug level:
678c2ecf20Sopenharmony_ci *  0 = silent, print only serious errors
688c2ecf20Sopenharmony_ci *  1 = normal, print error messages
698c2ecf20Sopenharmony_ci *  2 = debug, print debug infos
708c2ecf20Sopenharmony_ci *  3 = debug, print even more debug infos (packet data)
718c2ecf20Sopenharmony_ci */
728c2ecf20Sopenharmony_ci
738c2ecf20Sopenharmony_ci#define	LANCE_DEBUG	1
748c2ecf20Sopenharmony_ci
758c2ecf20Sopenharmony_ci#ifdef LANCE_DEBUG
768c2ecf20Sopenharmony_cistatic int lance_debug = LANCE_DEBUG;
778c2ecf20Sopenharmony_ci#else
788c2ecf20Sopenharmony_cistatic int lance_debug = 1;
798c2ecf20Sopenharmony_ci#endif
808c2ecf20Sopenharmony_cimodule_param(lance_debug, int, 0);
818c2ecf20Sopenharmony_ciMODULE_PARM_DESC(lance_debug, "atarilance debug level (0-3)");
828c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL");
838c2ecf20Sopenharmony_ci
848c2ecf20Sopenharmony_ci/* Print debug messages on probing? */
858c2ecf20Sopenharmony_ci#undef LANCE_DEBUG_PROBE
868c2ecf20Sopenharmony_ci
878c2ecf20Sopenharmony_ci#define	DPRINTK(n,a)							\
888c2ecf20Sopenharmony_ci	do {										\
898c2ecf20Sopenharmony_ci		if (lance_debug >= n)					\
908c2ecf20Sopenharmony_ci			printk a;							\
918c2ecf20Sopenharmony_ci	} while( 0 )
928c2ecf20Sopenharmony_ci
938c2ecf20Sopenharmony_ci#ifdef LANCE_DEBUG_PROBE
948c2ecf20Sopenharmony_ci# define PROBE_PRINT(a)	printk a
958c2ecf20Sopenharmony_ci#else
968c2ecf20Sopenharmony_ci# define PROBE_PRINT(a)
978c2ecf20Sopenharmony_ci#endif
988c2ecf20Sopenharmony_ci
998c2ecf20Sopenharmony_ci/* These define the number of Rx and Tx buffers as log2. (Only powers
1008c2ecf20Sopenharmony_ci * of two are valid)
1018c2ecf20Sopenharmony_ci * Much more rx buffers (32) are reserved than tx buffers (8), since receiving
1028c2ecf20Sopenharmony_ci * is more time critical then sending and packets may have to remain in the
1038c2ecf20Sopenharmony_ci * board's memory when main memory is low.
1048c2ecf20Sopenharmony_ci */
1058c2ecf20Sopenharmony_ci
1068c2ecf20Sopenharmony_ci#define TX_LOG_RING_SIZE			3
1078c2ecf20Sopenharmony_ci#define RX_LOG_RING_SIZE			5
1088c2ecf20Sopenharmony_ci
1098c2ecf20Sopenharmony_ci/* These are the derived values */
1108c2ecf20Sopenharmony_ci
1118c2ecf20Sopenharmony_ci#define TX_RING_SIZE			(1 << TX_LOG_RING_SIZE)
1128c2ecf20Sopenharmony_ci#define TX_RING_LEN_BITS		(TX_LOG_RING_SIZE << 5)
1138c2ecf20Sopenharmony_ci#define	TX_RING_MOD_MASK		(TX_RING_SIZE - 1)
1148c2ecf20Sopenharmony_ci
1158c2ecf20Sopenharmony_ci#define RX_RING_SIZE			(1 << RX_LOG_RING_SIZE)
1168c2ecf20Sopenharmony_ci#define RX_RING_LEN_BITS		(RX_LOG_RING_SIZE << 5)
1178c2ecf20Sopenharmony_ci#define	RX_RING_MOD_MASK		(RX_RING_SIZE - 1)
1188c2ecf20Sopenharmony_ci
1198c2ecf20Sopenharmony_ci#define TX_TIMEOUT	(HZ/5)
1208c2ecf20Sopenharmony_ci
1218c2ecf20Sopenharmony_ci/* The LANCE Rx and Tx ring descriptors. */
1228c2ecf20Sopenharmony_cistruct lance_rx_head {
1238c2ecf20Sopenharmony_ci	unsigned short			base;		/* Low word of base addr */
1248c2ecf20Sopenharmony_ci	volatile unsigned char	flag;
1258c2ecf20Sopenharmony_ci	unsigned char			base_hi;	/* High word of base addr (unused) */
1268c2ecf20Sopenharmony_ci	short					buf_length;	/* This length is 2s complement! */
1278c2ecf20Sopenharmony_ci	volatile short			msg_length;	/* This length is "normal". */
1288c2ecf20Sopenharmony_ci};
1298c2ecf20Sopenharmony_ci
1308c2ecf20Sopenharmony_cistruct lance_tx_head {
1318c2ecf20Sopenharmony_ci	unsigned short			base;		/* Low word of base addr */
1328c2ecf20Sopenharmony_ci	volatile unsigned char	flag;
1338c2ecf20Sopenharmony_ci	unsigned char			base_hi;	/* High word of base addr (unused) */
1348c2ecf20Sopenharmony_ci	short					length;		/* Length is 2s complement! */
1358c2ecf20Sopenharmony_ci	volatile short			misc;
1368c2ecf20Sopenharmony_ci};
1378c2ecf20Sopenharmony_ci
1388c2ecf20Sopenharmony_cistruct ringdesc {
1398c2ecf20Sopenharmony_ci	unsigned short	adr_lo;		/* Low 16 bits of address */
1408c2ecf20Sopenharmony_ci	unsigned char	len;		/* Length bits */
1418c2ecf20Sopenharmony_ci	unsigned char	adr_hi;		/* High 8 bits of address (unused) */
1428c2ecf20Sopenharmony_ci};
1438c2ecf20Sopenharmony_ci
1448c2ecf20Sopenharmony_ci/* The LANCE initialization block, described in databook. */
1458c2ecf20Sopenharmony_cistruct lance_init_block {
1468c2ecf20Sopenharmony_ci	unsigned short	mode;		/* Pre-set mode */
1478c2ecf20Sopenharmony_ci	unsigned char	hwaddr[6];	/* Physical ethernet address */
1488c2ecf20Sopenharmony_ci	unsigned		filter[2];	/* Multicast filter (unused). */
1498c2ecf20Sopenharmony_ci	/* Receive and transmit ring base, along with length bits. */
1508c2ecf20Sopenharmony_ci	struct ringdesc	rx_ring;
1518c2ecf20Sopenharmony_ci	struct ringdesc	tx_ring;
1528c2ecf20Sopenharmony_ci};
1538c2ecf20Sopenharmony_ci
1548c2ecf20Sopenharmony_ci/* The whole layout of the Lance shared memory */
1558c2ecf20Sopenharmony_cistruct lance_memory {
1568c2ecf20Sopenharmony_ci	struct lance_init_block	init;
1578c2ecf20Sopenharmony_ci	struct lance_tx_head	tx_head[TX_RING_SIZE];
1588c2ecf20Sopenharmony_ci	struct lance_rx_head	rx_head[RX_RING_SIZE];
1598c2ecf20Sopenharmony_ci	char					packet_area[];	/* packet data follow after the
1608c2ecf20Sopenharmony_ci											 * init block and the ring
1618c2ecf20Sopenharmony_ci											 * descriptors and are located
1628c2ecf20Sopenharmony_ci											 * at runtime */
1638c2ecf20Sopenharmony_ci};
1648c2ecf20Sopenharmony_ci
1658c2ecf20Sopenharmony_ci/* RieblCard specifics:
1668c2ecf20Sopenharmony_ci * The original TOS driver for these cards reserves the area from offset
1678c2ecf20Sopenharmony_ci * 0xee70 to 0xeebb for storing configuration data. Of interest to us is the
1688c2ecf20Sopenharmony_ci * Ethernet address there, and the magic for verifying the data's validity.
1698c2ecf20Sopenharmony_ci * The reserved area isn't touch by packet buffers. Furthermore, offset 0xfffe
1708c2ecf20Sopenharmony_ci * is reserved for the interrupt vector number.
1718c2ecf20Sopenharmony_ci */
1728c2ecf20Sopenharmony_ci#define	RIEBL_RSVD_START	0xee70
1738c2ecf20Sopenharmony_ci#define	RIEBL_RSVD_END		0xeec0
1748c2ecf20Sopenharmony_ci#define RIEBL_MAGIC			0x09051990
1758c2ecf20Sopenharmony_ci#define RIEBL_MAGIC_ADDR	((unsigned long *)(((char *)MEM) + 0xee8a))
1768c2ecf20Sopenharmony_ci#define RIEBL_HWADDR_ADDR	((unsigned char *)(((char *)MEM) + 0xee8e))
1778c2ecf20Sopenharmony_ci#define RIEBL_IVEC_ADDR		((unsigned short *)(((char *)MEM) + 0xfffe))
1788c2ecf20Sopenharmony_ci
1798c2ecf20Sopenharmony_ci/* This is a default address for the old RieblCards without a battery
1808c2ecf20Sopenharmony_ci * that have no ethernet address at boot time. 00:00:36:04 is the
1818c2ecf20Sopenharmony_ci * prefix for Riebl cards, the 00:00 at the end is arbitrary.
1828c2ecf20Sopenharmony_ci */
1838c2ecf20Sopenharmony_ci
1848c2ecf20Sopenharmony_cistatic unsigned char OldRieblDefHwaddr[6] = {
1858c2ecf20Sopenharmony_ci	0x00, 0x00, 0x36, 0x04, 0x00, 0x00
1868c2ecf20Sopenharmony_ci};
1878c2ecf20Sopenharmony_ci
1888c2ecf20Sopenharmony_ci
1898c2ecf20Sopenharmony_ci/* I/O registers of the Lance chip */
1908c2ecf20Sopenharmony_ci
1918c2ecf20Sopenharmony_cistruct lance_ioreg {
1928c2ecf20Sopenharmony_ci/* base+0x0 */	volatile unsigned short	data;
1938c2ecf20Sopenharmony_ci/* base+0x2 */	volatile unsigned short	addr;
1948c2ecf20Sopenharmony_ci				unsigned char			_dummy1[3];
1958c2ecf20Sopenharmony_ci/* base+0x7 */	volatile unsigned char	ivec;
1968c2ecf20Sopenharmony_ci				unsigned char			_dummy2[5];
1978c2ecf20Sopenharmony_ci/* base+0xd */	volatile unsigned char	eeprom;
1988c2ecf20Sopenharmony_ci				unsigned char			_dummy3;
1998c2ecf20Sopenharmony_ci/* base+0xf */	volatile unsigned char	mem;
2008c2ecf20Sopenharmony_ci};
2018c2ecf20Sopenharmony_ci
2028c2ecf20Sopenharmony_ci/* Types of boards this driver supports */
2038c2ecf20Sopenharmony_ci
2048c2ecf20Sopenharmony_cienum lance_type {
2058c2ecf20Sopenharmony_ci	OLD_RIEBL,		/* old Riebl card without battery */
2068c2ecf20Sopenharmony_ci	NEW_RIEBL,		/* new Riebl card with battery */
2078c2ecf20Sopenharmony_ci	PAM_CARD		/* PAM card with EEPROM */
2088c2ecf20Sopenharmony_ci};
2098c2ecf20Sopenharmony_ci
2108c2ecf20Sopenharmony_cistatic char *lance_names[] = {
2118c2ecf20Sopenharmony_ci	"Riebl-Card (without battery)",
2128c2ecf20Sopenharmony_ci	"Riebl-Card (with battery)",
2138c2ecf20Sopenharmony_ci	"PAM intern card"
2148c2ecf20Sopenharmony_ci};
2158c2ecf20Sopenharmony_ci
2168c2ecf20Sopenharmony_ci/* The driver's private device structure */
2178c2ecf20Sopenharmony_ci
2188c2ecf20Sopenharmony_cistruct lance_private {
2198c2ecf20Sopenharmony_ci	enum lance_type		cardtype;
2208c2ecf20Sopenharmony_ci	struct lance_ioreg	*iobase;
2218c2ecf20Sopenharmony_ci	struct lance_memory	*mem;
2228c2ecf20Sopenharmony_ci	int		 	cur_rx, cur_tx;	/* The next free ring entry */
2238c2ecf20Sopenharmony_ci	int			dirty_tx;		/* Ring entries to be freed. */
2248c2ecf20Sopenharmony_ci				/* copy function */
2258c2ecf20Sopenharmony_ci	void			*(*memcpy_f)( void *, const void *, size_t );
2268c2ecf20Sopenharmony_ci/* This must be long for set_bit() */
2278c2ecf20Sopenharmony_ci	long			tx_full;
2288c2ecf20Sopenharmony_ci	spinlock_t		devlock;
2298c2ecf20Sopenharmony_ci};
2308c2ecf20Sopenharmony_ci
2318c2ecf20Sopenharmony_ci/* I/O register access macros */
2328c2ecf20Sopenharmony_ci
2338c2ecf20Sopenharmony_ci#define	MEM		lp->mem
2348c2ecf20Sopenharmony_ci#define	DREG	IO->data
2358c2ecf20Sopenharmony_ci#define	AREG	IO->addr
2368c2ecf20Sopenharmony_ci#define	REGA(a)	(*( AREG = (a), &DREG ))
2378c2ecf20Sopenharmony_ci
2388c2ecf20Sopenharmony_ci/* Definitions for packet buffer access: */
2398c2ecf20Sopenharmony_ci#define PKT_BUF_SZ		1544
2408c2ecf20Sopenharmony_ci/* Get the address of a packet buffer corresponding to a given buffer head */
2418c2ecf20Sopenharmony_ci#define	PKTBUF_ADDR(head)	(((unsigned char *)(MEM)) + (head)->base)
2428c2ecf20Sopenharmony_ci
2438c2ecf20Sopenharmony_ci/* Possible memory/IO addresses for probing */
2448c2ecf20Sopenharmony_ci
2458c2ecf20Sopenharmony_cistatic struct lance_addr {
2468c2ecf20Sopenharmony_ci	unsigned long	memaddr;
2478c2ecf20Sopenharmony_ci	unsigned long	ioaddr;
2488c2ecf20Sopenharmony_ci	int				slow_flag;
2498c2ecf20Sopenharmony_ci} lance_addr_list[] = {
2508c2ecf20Sopenharmony_ci	{ 0xfe010000, 0xfe00fff0, 0 },	/* RieblCard VME in TT */
2518c2ecf20Sopenharmony_ci	{ 0xffc10000, 0xffc0fff0, 0 },	/* RieblCard VME in MegaSTE
2528c2ecf20Sopenharmony_ci									   (highest byte stripped) */
2538c2ecf20Sopenharmony_ci	{ 0xffe00000, 0xffff7000, 1 },	/* RieblCard in ST
2548c2ecf20Sopenharmony_ci									   (highest byte stripped) */
2558c2ecf20Sopenharmony_ci	{ 0xffd00000, 0xffff7000, 1 },	/* RieblCard in ST with hw modif. to
2568c2ecf20Sopenharmony_ci									   avoid conflict with ROM
2578c2ecf20Sopenharmony_ci									   (highest byte stripped) */
2588c2ecf20Sopenharmony_ci	{ 0xffcf0000, 0xffcffff0, 0 },	/* PAMCard VME in TT and MSTE
2598c2ecf20Sopenharmony_ci									   (highest byte stripped) */
2608c2ecf20Sopenharmony_ci	{ 0xfecf0000, 0xfecffff0, 0 },	/* Rhotron's PAMCard VME in TT and MSTE
2618c2ecf20Sopenharmony_ci									   (highest byte stripped) */
2628c2ecf20Sopenharmony_ci};
2638c2ecf20Sopenharmony_ci
2648c2ecf20Sopenharmony_ci#define	N_LANCE_ADDR	ARRAY_SIZE(lance_addr_list)
2658c2ecf20Sopenharmony_ci
2668c2ecf20Sopenharmony_ci
2678c2ecf20Sopenharmony_ci/* Definitions for the Lance */
2688c2ecf20Sopenharmony_ci
2698c2ecf20Sopenharmony_ci/* tx_head flags */
2708c2ecf20Sopenharmony_ci#define TMD1_ENP		0x01	/* end of packet */
2718c2ecf20Sopenharmony_ci#define TMD1_STP		0x02	/* start of packet */
2728c2ecf20Sopenharmony_ci#define TMD1_DEF		0x04	/* deferred */
2738c2ecf20Sopenharmony_ci#define TMD1_ONE		0x08	/* one retry needed */
2748c2ecf20Sopenharmony_ci#define TMD1_MORE		0x10	/* more than one retry needed */
2758c2ecf20Sopenharmony_ci#define TMD1_ERR		0x40	/* error summary */
2768c2ecf20Sopenharmony_ci#define TMD1_OWN 		0x80	/* ownership (set: chip owns) */
2778c2ecf20Sopenharmony_ci
2788c2ecf20Sopenharmony_ci#define TMD1_OWN_CHIP	TMD1_OWN
2798c2ecf20Sopenharmony_ci#define TMD1_OWN_HOST	0
2808c2ecf20Sopenharmony_ci
2818c2ecf20Sopenharmony_ci/* tx_head misc field */
2828c2ecf20Sopenharmony_ci#define TMD3_TDR		0x03FF	/* Time Domain Reflectometry counter */
2838c2ecf20Sopenharmony_ci#define TMD3_RTRY		0x0400	/* failed after 16 retries */
2848c2ecf20Sopenharmony_ci#define TMD3_LCAR		0x0800	/* carrier lost */
2858c2ecf20Sopenharmony_ci#define TMD3_LCOL		0x1000	/* late collision */
2868c2ecf20Sopenharmony_ci#define TMD3_UFLO		0x4000	/* underflow (late memory) */
2878c2ecf20Sopenharmony_ci#define TMD3_BUFF		0x8000	/* buffering error (no ENP) */
2888c2ecf20Sopenharmony_ci
2898c2ecf20Sopenharmony_ci/* rx_head flags */
2908c2ecf20Sopenharmony_ci#define RMD1_ENP		0x01	/* end of packet */
2918c2ecf20Sopenharmony_ci#define RMD1_STP		0x02	/* start of packet */
2928c2ecf20Sopenharmony_ci#define RMD1_BUFF		0x04	/* buffer error */
2938c2ecf20Sopenharmony_ci#define RMD1_CRC		0x08	/* CRC error */
2948c2ecf20Sopenharmony_ci#define RMD1_OFLO		0x10	/* overflow */
2958c2ecf20Sopenharmony_ci#define RMD1_FRAM		0x20	/* framing error */
2968c2ecf20Sopenharmony_ci#define RMD1_ERR		0x40	/* error summary */
2978c2ecf20Sopenharmony_ci#define RMD1_OWN 		0x80	/* ownership (set: ship owns) */
2988c2ecf20Sopenharmony_ci
2998c2ecf20Sopenharmony_ci#define RMD1_OWN_CHIP	RMD1_OWN
3008c2ecf20Sopenharmony_ci#define RMD1_OWN_HOST	0
3018c2ecf20Sopenharmony_ci
3028c2ecf20Sopenharmony_ci/* register names */
3038c2ecf20Sopenharmony_ci#define CSR0	0		/* mode/status */
3048c2ecf20Sopenharmony_ci#define CSR1	1		/* init block addr (low) */
3058c2ecf20Sopenharmony_ci#define CSR2	2		/* init block addr (high) */
3068c2ecf20Sopenharmony_ci#define CSR3	3		/* misc */
3078c2ecf20Sopenharmony_ci#define CSR8	8	  	/* address filter */
3088c2ecf20Sopenharmony_ci#define CSR15	15		/* promiscuous mode */
3098c2ecf20Sopenharmony_ci
3108c2ecf20Sopenharmony_ci/* CSR0 */
3118c2ecf20Sopenharmony_ci/* (R=readable, W=writeable, S=set on write, C=clear on write) */
3128c2ecf20Sopenharmony_ci#define CSR0_INIT	0x0001		/* initialize (RS) */
3138c2ecf20Sopenharmony_ci#define CSR0_STRT	0x0002		/* start (RS) */
3148c2ecf20Sopenharmony_ci#define CSR0_STOP	0x0004		/* stop (RS) */
3158c2ecf20Sopenharmony_ci#define CSR0_TDMD	0x0008		/* transmit demand (RS) */
3168c2ecf20Sopenharmony_ci#define CSR0_TXON	0x0010		/* transmitter on (R) */
3178c2ecf20Sopenharmony_ci#define CSR0_RXON	0x0020		/* receiver on (R) */
3188c2ecf20Sopenharmony_ci#define CSR0_INEA	0x0040		/* interrupt enable (RW) */
3198c2ecf20Sopenharmony_ci#define CSR0_INTR	0x0080		/* interrupt active (R) */
3208c2ecf20Sopenharmony_ci#define CSR0_IDON	0x0100		/* initialization done (RC) */
3218c2ecf20Sopenharmony_ci#define CSR0_TINT	0x0200		/* transmitter interrupt (RC) */
3228c2ecf20Sopenharmony_ci#define CSR0_RINT	0x0400		/* receiver interrupt (RC) */
3238c2ecf20Sopenharmony_ci#define CSR0_MERR	0x0800		/* memory error (RC) */
3248c2ecf20Sopenharmony_ci#define CSR0_MISS	0x1000		/* missed frame (RC) */
3258c2ecf20Sopenharmony_ci#define CSR0_CERR	0x2000		/* carrier error (no heartbeat :-) (RC) */
3268c2ecf20Sopenharmony_ci#define CSR0_BABL	0x4000		/* babble: tx-ed too many bits (RC) */
3278c2ecf20Sopenharmony_ci#define CSR0_ERR	0x8000		/* error (RC) */
3288c2ecf20Sopenharmony_ci
3298c2ecf20Sopenharmony_ci/* CSR3 */
3308c2ecf20Sopenharmony_ci#define CSR3_BCON	0x0001		/* byte control */
3318c2ecf20Sopenharmony_ci#define CSR3_ACON	0x0002		/* ALE control */
3328c2ecf20Sopenharmony_ci#define CSR3_BSWP	0x0004		/* byte swap (1=big endian) */
3338c2ecf20Sopenharmony_ci
3348c2ecf20Sopenharmony_ci
3358c2ecf20Sopenharmony_ci
3368c2ecf20Sopenharmony_ci/***************************** Prototypes *****************************/
3378c2ecf20Sopenharmony_ci
3388c2ecf20Sopenharmony_cistatic unsigned long lance_probe1( struct net_device *dev, struct lance_addr
3398c2ecf20Sopenharmony_ci                                   *init_rec );
3408c2ecf20Sopenharmony_cistatic int lance_open( struct net_device *dev );
3418c2ecf20Sopenharmony_cistatic void lance_init_ring( struct net_device *dev );
3428c2ecf20Sopenharmony_cistatic netdev_tx_t lance_start_xmit(struct sk_buff *skb,
3438c2ecf20Sopenharmony_ci				    struct net_device *dev);
3448c2ecf20Sopenharmony_cistatic irqreturn_t lance_interrupt( int irq, void *dev_id );
3458c2ecf20Sopenharmony_cistatic int lance_rx( struct net_device *dev );
3468c2ecf20Sopenharmony_cistatic int lance_close( struct net_device *dev );
3478c2ecf20Sopenharmony_cistatic void set_multicast_list( struct net_device *dev );
3488c2ecf20Sopenharmony_cistatic int lance_set_mac_address( struct net_device *dev, void *addr );
3498c2ecf20Sopenharmony_cistatic void lance_tx_timeout (struct net_device *dev, unsigned int txqueue);
3508c2ecf20Sopenharmony_ci
3518c2ecf20Sopenharmony_ci/************************* End of Prototypes **************************/
3528c2ecf20Sopenharmony_ci
3538c2ecf20Sopenharmony_ci
3548c2ecf20Sopenharmony_ci
3558c2ecf20Sopenharmony_ci
3568c2ecf20Sopenharmony_ci
3578c2ecf20Sopenharmony_cistatic void *slow_memcpy( void *dst, const void *src, size_t len )
3588c2ecf20Sopenharmony_ci
3598c2ecf20Sopenharmony_ci{	char *cto = dst;
3608c2ecf20Sopenharmony_ci	const char *cfrom = src;
3618c2ecf20Sopenharmony_ci
3628c2ecf20Sopenharmony_ci	while( len-- ) {
3638c2ecf20Sopenharmony_ci		*cto++ = *cfrom++;
3648c2ecf20Sopenharmony_ci		MFPDELAY();
3658c2ecf20Sopenharmony_ci	}
3668c2ecf20Sopenharmony_ci	return dst;
3678c2ecf20Sopenharmony_ci}
3688c2ecf20Sopenharmony_ci
3698c2ecf20Sopenharmony_ci
3708c2ecf20Sopenharmony_cistruct net_device * __init atarilance_probe(int unit)
3718c2ecf20Sopenharmony_ci{
3728c2ecf20Sopenharmony_ci	int i;
3738c2ecf20Sopenharmony_ci	static int found;
3748c2ecf20Sopenharmony_ci	struct net_device *dev;
3758c2ecf20Sopenharmony_ci	int err = -ENODEV;
3768c2ecf20Sopenharmony_ci
3778c2ecf20Sopenharmony_ci	if (!MACH_IS_ATARI || found)
3788c2ecf20Sopenharmony_ci		/* Assume there's only one board possible... That seems true, since
3798c2ecf20Sopenharmony_ci		 * the Riebl/PAM board's address cannot be changed. */
3808c2ecf20Sopenharmony_ci		return ERR_PTR(-ENODEV);
3818c2ecf20Sopenharmony_ci
3828c2ecf20Sopenharmony_ci	dev = alloc_etherdev(sizeof(struct lance_private));
3838c2ecf20Sopenharmony_ci	if (!dev)
3848c2ecf20Sopenharmony_ci		return ERR_PTR(-ENOMEM);
3858c2ecf20Sopenharmony_ci	if (unit >= 0) {
3868c2ecf20Sopenharmony_ci		sprintf(dev->name, "eth%d", unit);
3878c2ecf20Sopenharmony_ci		netdev_boot_setup_check(dev);
3888c2ecf20Sopenharmony_ci	}
3898c2ecf20Sopenharmony_ci
3908c2ecf20Sopenharmony_ci	for( i = 0; i < N_LANCE_ADDR; ++i ) {
3918c2ecf20Sopenharmony_ci		if (lance_probe1( dev, &lance_addr_list[i] )) {
3928c2ecf20Sopenharmony_ci			found = 1;
3938c2ecf20Sopenharmony_ci			err = register_netdev(dev);
3948c2ecf20Sopenharmony_ci			if (!err)
3958c2ecf20Sopenharmony_ci				return dev;
3968c2ecf20Sopenharmony_ci			free_irq(dev->irq, dev);
3978c2ecf20Sopenharmony_ci			break;
3988c2ecf20Sopenharmony_ci		}
3998c2ecf20Sopenharmony_ci	}
4008c2ecf20Sopenharmony_ci	free_netdev(dev);
4018c2ecf20Sopenharmony_ci	return ERR_PTR(err);
4028c2ecf20Sopenharmony_ci}
4038c2ecf20Sopenharmony_ci
4048c2ecf20Sopenharmony_ci
4058c2ecf20Sopenharmony_ci/* Derived from hwreg_present() in atari/config.c: */
4068c2ecf20Sopenharmony_ci
4078c2ecf20Sopenharmony_cistatic noinline int __init addr_accessible(volatile void *regp, int wordflag,
4088c2ecf20Sopenharmony_ci					   int writeflag)
4098c2ecf20Sopenharmony_ci{
4108c2ecf20Sopenharmony_ci	int		ret;
4118c2ecf20Sopenharmony_ci	unsigned long	flags;
4128c2ecf20Sopenharmony_ci	long	*vbr, save_berr;
4138c2ecf20Sopenharmony_ci
4148c2ecf20Sopenharmony_ci	local_irq_save(flags);
4158c2ecf20Sopenharmony_ci
4168c2ecf20Sopenharmony_ci	__asm__ __volatile__ ( "movec	%/vbr,%0" : "=r" (vbr) : );
4178c2ecf20Sopenharmony_ci	save_berr = vbr[2];
4188c2ecf20Sopenharmony_ci
4198c2ecf20Sopenharmony_ci	__asm__ __volatile__
4208c2ecf20Sopenharmony_ci	(	"movel	%/sp,%/d1\n\t"
4218c2ecf20Sopenharmony_ci		"movel	#Lberr,%2@\n\t"
4228c2ecf20Sopenharmony_ci		"moveq	#0,%0\n\t"
4238c2ecf20Sopenharmony_ci		"tstl   %3\n\t"
4248c2ecf20Sopenharmony_ci		"bne	1f\n\t"
4258c2ecf20Sopenharmony_ci		"moveb	%1@,%/d0\n\t"
4268c2ecf20Sopenharmony_ci		"nop	\n\t"
4278c2ecf20Sopenharmony_ci		"bra	2f\n"
4288c2ecf20Sopenharmony_ci"1:		 movew	%1@,%/d0\n\t"
4298c2ecf20Sopenharmony_ci		"nop	\n"
4308c2ecf20Sopenharmony_ci"2:		 tstl   %4\n\t"
4318c2ecf20Sopenharmony_ci		"beq	2f\n\t"
4328c2ecf20Sopenharmony_ci		"tstl	%3\n\t"
4338c2ecf20Sopenharmony_ci		"bne	1f\n\t"
4348c2ecf20Sopenharmony_ci		"clrb	%1@\n\t"
4358c2ecf20Sopenharmony_ci		"nop	\n\t"
4368c2ecf20Sopenharmony_ci		"moveb	%/d0,%1@\n\t"
4378c2ecf20Sopenharmony_ci		"nop	\n\t"
4388c2ecf20Sopenharmony_ci		"bra	2f\n"
4398c2ecf20Sopenharmony_ci"1:		 clrw	%1@\n\t"
4408c2ecf20Sopenharmony_ci		"nop	\n\t"
4418c2ecf20Sopenharmony_ci		"movew	%/d0,%1@\n\t"
4428c2ecf20Sopenharmony_ci		"nop	\n"
4438c2ecf20Sopenharmony_ci"2:		 moveq	#1,%0\n"
4448c2ecf20Sopenharmony_ci"Lberr:	 movel	%/d1,%/sp"
4458c2ecf20Sopenharmony_ci		: "=&d" (ret)
4468c2ecf20Sopenharmony_ci		: "a" (regp), "a" (&vbr[2]), "rm" (wordflag), "rm" (writeflag)
4478c2ecf20Sopenharmony_ci		: "d0", "d1", "memory"
4488c2ecf20Sopenharmony_ci	);
4498c2ecf20Sopenharmony_ci
4508c2ecf20Sopenharmony_ci	vbr[2] = save_berr;
4518c2ecf20Sopenharmony_ci	local_irq_restore(flags);
4528c2ecf20Sopenharmony_ci
4538c2ecf20Sopenharmony_ci	return ret;
4548c2ecf20Sopenharmony_ci}
4558c2ecf20Sopenharmony_ci
4568c2ecf20Sopenharmony_cistatic const struct net_device_ops lance_netdev_ops = {
4578c2ecf20Sopenharmony_ci	.ndo_open		= lance_open,
4588c2ecf20Sopenharmony_ci	.ndo_stop		= lance_close,
4598c2ecf20Sopenharmony_ci	.ndo_start_xmit		= lance_start_xmit,
4608c2ecf20Sopenharmony_ci	.ndo_set_rx_mode	= set_multicast_list,
4618c2ecf20Sopenharmony_ci	.ndo_set_mac_address	= lance_set_mac_address,
4628c2ecf20Sopenharmony_ci	.ndo_tx_timeout		= lance_tx_timeout,
4638c2ecf20Sopenharmony_ci	.ndo_validate_addr	= eth_validate_addr,
4648c2ecf20Sopenharmony_ci};
4658c2ecf20Sopenharmony_ci
4668c2ecf20Sopenharmony_cistatic unsigned long __init lance_probe1( struct net_device *dev,
4678c2ecf20Sopenharmony_ci					   struct lance_addr *init_rec )
4688c2ecf20Sopenharmony_ci{
4698c2ecf20Sopenharmony_ci	volatile unsigned short *memaddr =
4708c2ecf20Sopenharmony_ci		(volatile unsigned short *)init_rec->memaddr;
4718c2ecf20Sopenharmony_ci	volatile unsigned short *ioaddr =
4728c2ecf20Sopenharmony_ci		(volatile unsigned short *)init_rec->ioaddr;
4738c2ecf20Sopenharmony_ci	struct lance_private	*lp;
4748c2ecf20Sopenharmony_ci	struct lance_ioreg		*IO;
4758c2ecf20Sopenharmony_ci	int 					i;
4768c2ecf20Sopenharmony_ci	static int 				did_version;
4778c2ecf20Sopenharmony_ci	unsigned short			save1, save2;
4788c2ecf20Sopenharmony_ci
4798c2ecf20Sopenharmony_ci	PROBE_PRINT(( "Probing for Lance card at mem %#lx io %#lx\n",
4808c2ecf20Sopenharmony_ci				  (long)memaddr, (long)ioaddr ));
4818c2ecf20Sopenharmony_ci
4828c2ecf20Sopenharmony_ci	/* Test whether memory readable and writable */
4838c2ecf20Sopenharmony_ci	PROBE_PRINT(( "lance_probe1: testing memory to be accessible\n" ));
4848c2ecf20Sopenharmony_ci	if (!addr_accessible( memaddr, 1, 1 )) goto probe_fail;
4858c2ecf20Sopenharmony_ci
4868c2ecf20Sopenharmony_ci	/* Written values should come back... */
4878c2ecf20Sopenharmony_ci	PROBE_PRINT(( "lance_probe1: testing memory to be writable (1)\n" ));
4888c2ecf20Sopenharmony_ci	save1 = *memaddr;
4898c2ecf20Sopenharmony_ci	*memaddr = 0x0001;
4908c2ecf20Sopenharmony_ci	if (*memaddr != 0x0001) goto probe_fail;
4918c2ecf20Sopenharmony_ci	PROBE_PRINT(( "lance_probe1: testing memory to be writable (2)\n" ));
4928c2ecf20Sopenharmony_ci	*memaddr = 0x0000;
4938c2ecf20Sopenharmony_ci	if (*memaddr != 0x0000) goto probe_fail;
4948c2ecf20Sopenharmony_ci	*memaddr = save1;
4958c2ecf20Sopenharmony_ci
4968c2ecf20Sopenharmony_ci	/* First port should be readable and writable */
4978c2ecf20Sopenharmony_ci	PROBE_PRINT(( "lance_probe1: testing ioport to be accessible\n" ));
4988c2ecf20Sopenharmony_ci	if (!addr_accessible( ioaddr, 1, 1 )) goto probe_fail;
4998c2ecf20Sopenharmony_ci
5008c2ecf20Sopenharmony_ci	/* and written values should be readable */
5018c2ecf20Sopenharmony_ci	PROBE_PRINT(( "lance_probe1: testing ioport to be writeable\n" ));
5028c2ecf20Sopenharmony_ci	save2 = ioaddr[1];
5038c2ecf20Sopenharmony_ci	ioaddr[1] = 0x0001;
5048c2ecf20Sopenharmony_ci	if (ioaddr[1] != 0x0001) goto probe_fail;
5058c2ecf20Sopenharmony_ci
5068c2ecf20Sopenharmony_ci	/* The CSR0_INIT bit should not be readable */
5078c2ecf20Sopenharmony_ci	PROBE_PRINT(( "lance_probe1: testing CSR0 register function (1)\n" ));
5088c2ecf20Sopenharmony_ci	save1 = ioaddr[0];
5098c2ecf20Sopenharmony_ci	ioaddr[1] = CSR0;
5108c2ecf20Sopenharmony_ci	ioaddr[0] = CSR0_INIT | CSR0_STOP;
5118c2ecf20Sopenharmony_ci	if (ioaddr[0] != CSR0_STOP) {
5128c2ecf20Sopenharmony_ci		ioaddr[0] = save1;
5138c2ecf20Sopenharmony_ci		ioaddr[1] = save2;
5148c2ecf20Sopenharmony_ci		goto probe_fail;
5158c2ecf20Sopenharmony_ci	}
5168c2ecf20Sopenharmony_ci	PROBE_PRINT(( "lance_probe1: testing CSR0 register function (2)\n" ));
5178c2ecf20Sopenharmony_ci	ioaddr[0] = CSR0_STOP;
5188c2ecf20Sopenharmony_ci	if (ioaddr[0] != CSR0_STOP) {
5198c2ecf20Sopenharmony_ci		ioaddr[0] = save1;
5208c2ecf20Sopenharmony_ci		ioaddr[1] = save2;
5218c2ecf20Sopenharmony_ci		goto probe_fail;
5228c2ecf20Sopenharmony_ci	}
5238c2ecf20Sopenharmony_ci
5248c2ecf20Sopenharmony_ci	/* Now ok... */
5258c2ecf20Sopenharmony_ci	PROBE_PRINT(( "lance_probe1: Lance card detected\n" ));
5268c2ecf20Sopenharmony_ci	goto probe_ok;
5278c2ecf20Sopenharmony_ci
5288c2ecf20Sopenharmony_ci  probe_fail:
5298c2ecf20Sopenharmony_ci	return 0;
5308c2ecf20Sopenharmony_ci
5318c2ecf20Sopenharmony_ci  probe_ok:
5328c2ecf20Sopenharmony_ci	lp = netdev_priv(dev);
5338c2ecf20Sopenharmony_ci	MEM = (struct lance_memory *)memaddr;
5348c2ecf20Sopenharmony_ci	IO = lp->iobase = (struct lance_ioreg *)ioaddr;
5358c2ecf20Sopenharmony_ci	dev->base_addr = (unsigned long)ioaddr; /* informational only */
5368c2ecf20Sopenharmony_ci	lp->memcpy_f = init_rec->slow_flag ? slow_memcpy : memcpy;
5378c2ecf20Sopenharmony_ci
5388c2ecf20Sopenharmony_ci	REGA( CSR0 ) = CSR0_STOP;
5398c2ecf20Sopenharmony_ci
5408c2ecf20Sopenharmony_ci	/* Now test for type: If the eeprom I/O port is readable, it is a
5418c2ecf20Sopenharmony_ci	 * PAM card */
5428c2ecf20Sopenharmony_ci	if (addr_accessible( &(IO->eeprom), 0, 0 )) {
5438c2ecf20Sopenharmony_ci		/* Switch back to Ram */
5448c2ecf20Sopenharmony_ci		i = IO->mem;
5458c2ecf20Sopenharmony_ci		lp->cardtype = PAM_CARD;
5468c2ecf20Sopenharmony_ci	}
5478c2ecf20Sopenharmony_ci	else if (*RIEBL_MAGIC_ADDR == RIEBL_MAGIC) {
5488c2ecf20Sopenharmony_ci		lp->cardtype = NEW_RIEBL;
5498c2ecf20Sopenharmony_ci	}
5508c2ecf20Sopenharmony_ci	else
5518c2ecf20Sopenharmony_ci		lp->cardtype = OLD_RIEBL;
5528c2ecf20Sopenharmony_ci
5538c2ecf20Sopenharmony_ci	if (lp->cardtype == PAM_CARD ||
5548c2ecf20Sopenharmony_ci		memaddr == (unsigned short *)0xffe00000) {
5558c2ecf20Sopenharmony_ci		/* PAMs card and Riebl on ST use level 5 autovector */
5568c2ecf20Sopenharmony_ci		if (request_irq(IRQ_AUTO_5, lance_interrupt, 0,
5578c2ecf20Sopenharmony_ci				"PAM,Riebl-ST Ethernet", dev)) {
5588c2ecf20Sopenharmony_ci			printk( "Lance: request for irq %d failed\n", IRQ_AUTO_5 );
5598c2ecf20Sopenharmony_ci			return 0;
5608c2ecf20Sopenharmony_ci		}
5618c2ecf20Sopenharmony_ci		dev->irq = IRQ_AUTO_5;
5628c2ecf20Sopenharmony_ci	}
5638c2ecf20Sopenharmony_ci	else {
5648c2ecf20Sopenharmony_ci		/* For VME-RieblCards, request a free VME int */
5658c2ecf20Sopenharmony_ci		unsigned int irq = atari_register_vme_int();
5668c2ecf20Sopenharmony_ci		if (!irq) {
5678c2ecf20Sopenharmony_ci			printk( "Lance: request for VME interrupt failed\n" );
5688c2ecf20Sopenharmony_ci			return 0;
5698c2ecf20Sopenharmony_ci		}
5708c2ecf20Sopenharmony_ci		if (request_irq(irq, lance_interrupt, 0, "Riebl-VME Ethernet",
5718c2ecf20Sopenharmony_ci				dev)) {
5728c2ecf20Sopenharmony_ci			printk( "Lance: request for irq %u failed\n", irq );
5738c2ecf20Sopenharmony_ci			return 0;
5748c2ecf20Sopenharmony_ci		}
5758c2ecf20Sopenharmony_ci		dev->irq = irq;
5768c2ecf20Sopenharmony_ci	}
5778c2ecf20Sopenharmony_ci
5788c2ecf20Sopenharmony_ci	printk("%s: %s at io %#lx, mem %#lx, irq %d%s, hwaddr ",
5798c2ecf20Sopenharmony_ci		   dev->name, lance_names[lp->cardtype],
5808c2ecf20Sopenharmony_ci		   (unsigned long)ioaddr,
5818c2ecf20Sopenharmony_ci		   (unsigned long)memaddr,
5828c2ecf20Sopenharmony_ci		   dev->irq,
5838c2ecf20Sopenharmony_ci		   init_rec->slow_flag ? " (slow memcpy)" : "" );
5848c2ecf20Sopenharmony_ci
5858c2ecf20Sopenharmony_ci	/* Get the ethernet address */
5868c2ecf20Sopenharmony_ci	switch( lp->cardtype ) {
5878c2ecf20Sopenharmony_ci	  case OLD_RIEBL:
5888c2ecf20Sopenharmony_ci		/* No ethernet address! (Set some default address) */
5898c2ecf20Sopenharmony_ci		memcpy(dev->dev_addr, OldRieblDefHwaddr, ETH_ALEN);
5908c2ecf20Sopenharmony_ci		break;
5918c2ecf20Sopenharmony_ci	  case NEW_RIEBL:
5928c2ecf20Sopenharmony_ci		lp->memcpy_f(dev->dev_addr, RIEBL_HWADDR_ADDR, ETH_ALEN);
5938c2ecf20Sopenharmony_ci		break;
5948c2ecf20Sopenharmony_ci	  case PAM_CARD:
5958c2ecf20Sopenharmony_ci		i = IO->eeprom;
5968c2ecf20Sopenharmony_ci		for( i = 0; i < 6; ++i )
5978c2ecf20Sopenharmony_ci			dev->dev_addr[i] =
5988c2ecf20Sopenharmony_ci				((((unsigned short *)MEM)[i*2] & 0x0f) << 4) |
5998c2ecf20Sopenharmony_ci				((((unsigned short *)MEM)[i*2+1] & 0x0f));
6008c2ecf20Sopenharmony_ci		i = IO->mem;
6018c2ecf20Sopenharmony_ci		break;
6028c2ecf20Sopenharmony_ci	}
6038c2ecf20Sopenharmony_ci	printk("%pM\n", dev->dev_addr);
6048c2ecf20Sopenharmony_ci	if (lp->cardtype == OLD_RIEBL) {
6058c2ecf20Sopenharmony_ci		printk( "%s: Warning: This is a default ethernet address!\n",
6068c2ecf20Sopenharmony_ci				dev->name );
6078c2ecf20Sopenharmony_ci		printk( "      Use \"ifconfig hw ether ...\" to set the address.\n" );
6088c2ecf20Sopenharmony_ci	}
6098c2ecf20Sopenharmony_ci
6108c2ecf20Sopenharmony_ci	spin_lock_init(&lp->devlock);
6118c2ecf20Sopenharmony_ci
6128c2ecf20Sopenharmony_ci	MEM->init.mode = 0x0000;		/* Disable Rx and Tx. */
6138c2ecf20Sopenharmony_ci	for( i = 0; i < 6; i++ )
6148c2ecf20Sopenharmony_ci		MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */
6158c2ecf20Sopenharmony_ci	MEM->init.filter[0] = 0x00000000;
6168c2ecf20Sopenharmony_ci	MEM->init.filter[1] = 0x00000000;
6178c2ecf20Sopenharmony_ci	MEM->init.rx_ring.adr_lo = offsetof( struct lance_memory, rx_head );
6188c2ecf20Sopenharmony_ci	MEM->init.rx_ring.adr_hi = 0;
6198c2ecf20Sopenharmony_ci	MEM->init.rx_ring.len    = RX_RING_LEN_BITS;
6208c2ecf20Sopenharmony_ci	MEM->init.tx_ring.adr_lo = offsetof( struct lance_memory, tx_head );
6218c2ecf20Sopenharmony_ci	MEM->init.tx_ring.adr_hi = 0;
6228c2ecf20Sopenharmony_ci	MEM->init.tx_ring.len    = TX_RING_LEN_BITS;
6238c2ecf20Sopenharmony_ci
6248c2ecf20Sopenharmony_ci	if (lp->cardtype == PAM_CARD)
6258c2ecf20Sopenharmony_ci		IO->ivec = IRQ_SOURCE_TO_VECTOR(dev->irq);
6268c2ecf20Sopenharmony_ci	else
6278c2ecf20Sopenharmony_ci		*RIEBL_IVEC_ADDR = IRQ_SOURCE_TO_VECTOR(dev->irq);
6288c2ecf20Sopenharmony_ci
6298c2ecf20Sopenharmony_ci	if (did_version++ == 0)
6308c2ecf20Sopenharmony_ci		DPRINTK( 1, ( version ));
6318c2ecf20Sopenharmony_ci
6328c2ecf20Sopenharmony_ci	dev->netdev_ops = &lance_netdev_ops;
6338c2ecf20Sopenharmony_ci
6348c2ecf20Sopenharmony_ci	/* XXX MSch */
6358c2ecf20Sopenharmony_ci	dev->watchdog_timeo = TX_TIMEOUT;
6368c2ecf20Sopenharmony_ci
6378c2ecf20Sopenharmony_ci	return 1;
6388c2ecf20Sopenharmony_ci}
6398c2ecf20Sopenharmony_ci
6408c2ecf20Sopenharmony_ci
6418c2ecf20Sopenharmony_cistatic int lance_open( struct net_device *dev )
6428c2ecf20Sopenharmony_ci{
6438c2ecf20Sopenharmony_ci	struct lance_private *lp = netdev_priv(dev);
6448c2ecf20Sopenharmony_ci	struct lance_ioreg	 *IO = lp->iobase;
6458c2ecf20Sopenharmony_ci	int i;
6468c2ecf20Sopenharmony_ci
6478c2ecf20Sopenharmony_ci	DPRINTK( 2, ( "%s: lance_open()\n", dev->name ));
6488c2ecf20Sopenharmony_ci
6498c2ecf20Sopenharmony_ci	lance_init_ring(dev);
6508c2ecf20Sopenharmony_ci	/* Re-initialize the LANCE, and start it when done. */
6518c2ecf20Sopenharmony_ci
6528c2ecf20Sopenharmony_ci	REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
6538c2ecf20Sopenharmony_ci	REGA( CSR2 ) = 0;
6548c2ecf20Sopenharmony_ci	REGA( CSR1 ) = 0;
6558c2ecf20Sopenharmony_ci	REGA( CSR0 ) = CSR0_INIT;
6568c2ecf20Sopenharmony_ci	/* From now on, AREG is kept to point to CSR0 */
6578c2ecf20Sopenharmony_ci
6588c2ecf20Sopenharmony_ci	i = 1000000;
6598c2ecf20Sopenharmony_ci	while (--i > 0)
6608c2ecf20Sopenharmony_ci		if (DREG & CSR0_IDON)
6618c2ecf20Sopenharmony_ci			break;
6628c2ecf20Sopenharmony_ci	if (i <= 0 || (DREG & CSR0_ERR)) {
6638c2ecf20Sopenharmony_ci		DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n",
6648c2ecf20Sopenharmony_ci					  dev->name, i, DREG ));
6658c2ecf20Sopenharmony_ci		DREG = CSR0_STOP;
6668c2ecf20Sopenharmony_ci		return -EIO;
6678c2ecf20Sopenharmony_ci	}
6688c2ecf20Sopenharmony_ci	DREG = CSR0_IDON;
6698c2ecf20Sopenharmony_ci	DREG = CSR0_STRT;
6708c2ecf20Sopenharmony_ci	DREG = CSR0_INEA;
6718c2ecf20Sopenharmony_ci
6728c2ecf20Sopenharmony_ci	netif_start_queue (dev);
6738c2ecf20Sopenharmony_ci
6748c2ecf20Sopenharmony_ci	DPRINTK( 2, ( "%s: LANCE is open, csr0 %04x\n", dev->name, DREG ));
6758c2ecf20Sopenharmony_ci
6768c2ecf20Sopenharmony_ci	return 0;
6778c2ecf20Sopenharmony_ci}
6788c2ecf20Sopenharmony_ci
6798c2ecf20Sopenharmony_ci
6808c2ecf20Sopenharmony_ci/* Initialize the LANCE Rx and Tx rings. */
6818c2ecf20Sopenharmony_ci
6828c2ecf20Sopenharmony_cistatic void lance_init_ring( struct net_device *dev )
6838c2ecf20Sopenharmony_ci{
6848c2ecf20Sopenharmony_ci	struct lance_private *lp = netdev_priv(dev);
6858c2ecf20Sopenharmony_ci	int i;
6868c2ecf20Sopenharmony_ci	unsigned offset;
6878c2ecf20Sopenharmony_ci
6888c2ecf20Sopenharmony_ci	lp->tx_full = 0;
6898c2ecf20Sopenharmony_ci	lp->cur_rx = lp->cur_tx = 0;
6908c2ecf20Sopenharmony_ci	lp->dirty_tx = 0;
6918c2ecf20Sopenharmony_ci
6928c2ecf20Sopenharmony_ci	offset = offsetof( struct lance_memory, packet_area );
6938c2ecf20Sopenharmony_ci
6948c2ecf20Sopenharmony_ci/* If the packet buffer at offset 'o' would conflict with the reserved area
6958c2ecf20Sopenharmony_ci * of RieblCards, advance it */
6968c2ecf20Sopenharmony_ci#define	CHECK_OFFSET(o)														 \
6978c2ecf20Sopenharmony_ci	do {																	 \
6988c2ecf20Sopenharmony_ci		if (lp->cardtype == OLD_RIEBL || lp->cardtype == NEW_RIEBL) {		 \
6998c2ecf20Sopenharmony_ci			if (((o) < RIEBL_RSVD_START) ? (o)+PKT_BUF_SZ > RIEBL_RSVD_START \
7008c2ecf20Sopenharmony_ci										 : (o) < RIEBL_RSVD_END)			 \
7018c2ecf20Sopenharmony_ci				(o) = RIEBL_RSVD_END;										 \
7028c2ecf20Sopenharmony_ci		}																	 \
7038c2ecf20Sopenharmony_ci	} while(0)
7048c2ecf20Sopenharmony_ci
7058c2ecf20Sopenharmony_ci	for( i = 0; i < TX_RING_SIZE; i++ ) {
7068c2ecf20Sopenharmony_ci		CHECK_OFFSET(offset);
7078c2ecf20Sopenharmony_ci		MEM->tx_head[i].base = offset;
7088c2ecf20Sopenharmony_ci		MEM->tx_head[i].flag = TMD1_OWN_HOST;
7098c2ecf20Sopenharmony_ci 		MEM->tx_head[i].base_hi = 0;
7108c2ecf20Sopenharmony_ci		MEM->tx_head[i].length = 0;
7118c2ecf20Sopenharmony_ci		MEM->tx_head[i].misc = 0;
7128c2ecf20Sopenharmony_ci		offset += PKT_BUF_SZ;
7138c2ecf20Sopenharmony_ci	}
7148c2ecf20Sopenharmony_ci
7158c2ecf20Sopenharmony_ci	for( i = 0; i < RX_RING_SIZE; i++ ) {
7168c2ecf20Sopenharmony_ci		CHECK_OFFSET(offset);
7178c2ecf20Sopenharmony_ci		MEM->rx_head[i].base = offset;
7188c2ecf20Sopenharmony_ci		MEM->rx_head[i].flag = TMD1_OWN_CHIP;
7198c2ecf20Sopenharmony_ci		MEM->rx_head[i].base_hi = 0;
7208c2ecf20Sopenharmony_ci		MEM->rx_head[i].buf_length = -PKT_BUF_SZ;
7218c2ecf20Sopenharmony_ci		MEM->rx_head[i].msg_length = 0;
7228c2ecf20Sopenharmony_ci		offset += PKT_BUF_SZ;
7238c2ecf20Sopenharmony_ci	}
7248c2ecf20Sopenharmony_ci}
7258c2ecf20Sopenharmony_ci
7268c2ecf20Sopenharmony_ci
7278c2ecf20Sopenharmony_ci/* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
7288c2ecf20Sopenharmony_ci
7298c2ecf20Sopenharmony_ci
7308c2ecf20Sopenharmony_cistatic void lance_tx_timeout (struct net_device *dev, unsigned int txqueue)
7318c2ecf20Sopenharmony_ci{
7328c2ecf20Sopenharmony_ci	struct lance_private *lp = netdev_priv(dev);
7338c2ecf20Sopenharmony_ci	struct lance_ioreg	 *IO = lp->iobase;
7348c2ecf20Sopenharmony_ci
7358c2ecf20Sopenharmony_ci	AREG = CSR0;
7368c2ecf20Sopenharmony_ci	DPRINTK( 1, ( "%s: transmit timed out, status %04x, resetting.\n",
7378c2ecf20Sopenharmony_ci			  dev->name, DREG ));
7388c2ecf20Sopenharmony_ci	DREG = CSR0_STOP;
7398c2ecf20Sopenharmony_ci	/*
7408c2ecf20Sopenharmony_ci	 * Always set BSWP after a STOP as STOP puts it back into
7418c2ecf20Sopenharmony_ci	 * little endian mode.
7428c2ecf20Sopenharmony_ci	 */
7438c2ecf20Sopenharmony_ci	REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
7448c2ecf20Sopenharmony_ci	dev->stats.tx_errors++;
7458c2ecf20Sopenharmony_ci#ifndef final_version
7468c2ecf20Sopenharmony_ci		{	int i;
7478c2ecf20Sopenharmony_ci			DPRINTK( 2, ( "Ring data: dirty_tx %d cur_tx %d%s cur_rx %d\n",
7488c2ecf20Sopenharmony_ci						  lp->dirty_tx, lp->cur_tx,
7498c2ecf20Sopenharmony_ci						  lp->tx_full ? " (full)" : "",
7508c2ecf20Sopenharmony_ci						  lp->cur_rx ));
7518c2ecf20Sopenharmony_ci			for( i = 0 ; i < RX_RING_SIZE; i++ )
7528c2ecf20Sopenharmony_ci				DPRINTK( 2, ( "rx #%d: base=%04x blen=%04x mlen=%04x\n",
7538c2ecf20Sopenharmony_ci							  i, MEM->rx_head[i].base,
7548c2ecf20Sopenharmony_ci							  -MEM->rx_head[i].buf_length,
7558c2ecf20Sopenharmony_ci							  MEM->rx_head[i].msg_length ));
7568c2ecf20Sopenharmony_ci			for( i = 0 ; i < TX_RING_SIZE; i++ )
7578c2ecf20Sopenharmony_ci				DPRINTK( 2, ( "tx #%d: base=%04x len=%04x misc=%04x\n",
7588c2ecf20Sopenharmony_ci							  i, MEM->tx_head[i].base,
7598c2ecf20Sopenharmony_ci							  -MEM->tx_head[i].length,
7608c2ecf20Sopenharmony_ci							  MEM->tx_head[i].misc ));
7618c2ecf20Sopenharmony_ci		}
7628c2ecf20Sopenharmony_ci#endif
7638c2ecf20Sopenharmony_ci	/* XXX MSch: maybe purge/reinit ring here */
7648c2ecf20Sopenharmony_ci	/* lance_restart, essentially */
7658c2ecf20Sopenharmony_ci	lance_init_ring(dev);
7668c2ecf20Sopenharmony_ci	REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT;
7678c2ecf20Sopenharmony_ci	netif_trans_update(dev); /* prevent tx timeout */
7688c2ecf20Sopenharmony_ci	netif_wake_queue(dev);
7698c2ecf20Sopenharmony_ci}
7708c2ecf20Sopenharmony_ci
7718c2ecf20Sopenharmony_ci/* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
7728c2ecf20Sopenharmony_ci
7738c2ecf20Sopenharmony_cistatic netdev_tx_t
7748c2ecf20Sopenharmony_cilance_start_xmit(struct sk_buff *skb, struct net_device *dev)
7758c2ecf20Sopenharmony_ci{
7768c2ecf20Sopenharmony_ci	struct lance_private *lp = netdev_priv(dev);
7778c2ecf20Sopenharmony_ci	struct lance_ioreg	 *IO = lp->iobase;
7788c2ecf20Sopenharmony_ci	int entry, len;
7798c2ecf20Sopenharmony_ci	struct lance_tx_head *head;
7808c2ecf20Sopenharmony_ci	unsigned long flags;
7818c2ecf20Sopenharmony_ci
7828c2ecf20Sopenharmony_ci	DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n",
7838c2ecf20Sopenharmony_ci				  dev->name, DREG ));
7848c2ecf20Sopenharmony_ci
7858c2ecf20Sopenharmony_ci
7868c2ecf20Sopenharmony_ci	/* The old LANCE chips doesn't automatically pad buffers to min. size. */
7878c2ecf20Sopenharmony_ci	len = skb->len;
7888c2ecf20Sopenharmony_ci	if (len < ETH_ZLEN)
7898c2ecf20Sopenharmony_ci		len = ETH_ZLEN;
7908c2ecf20Sopenharmony_ci	/* PAM-Card has a bug: Can only send packets with even number of bytes! */
7918c2ecf20Sopenharmony_ci	else if (lp->cardtype == PAM_CARD && (len & 1))
7928c2ecf20Sopenharmony_ci		++len;
7938c2ecf20Sopenharmony_ci
7948c2ecf20Sopenharmony_ci	if (len > skb->len) {
7958c2ecf20Sopenharmony_ci		if (skb_padto(skb, len))
7968c2ecf20Sopenharmony_ci			return NETDEV_TX_OK;
7978c2ecf20Sopenharmony_ci	}
7988c2ecf20Sopenharmony_ci
7998c2ecf20Sopenharmony_ci	netif_stop_queue (dev);
8008c2ecf20Sopenharmony_ci
8018c2ecf20Sopenharmony_ci	/* Fill in a Tx ring entry */
8028c2ecf20Sopenharmony_ci	if (lance_debug >= 3) {
8038c2ecf20Sopenharmony_ci		printk( "%s: TX pkt type 0x%04x from %pM to %pM"
8048c2ecf20Sopenharmony_ci				" data at 0x%08x len %d\n",
8058c2ecf20Sopenharmony_ci				dev->name, ((u_short *)skb->data)[6],
8068c2ecf20Sopenharmony_ci				&skb->data[6], skb->data,
8078c2ecf20Sopenharmony_ci				(int)skb->data, (int)skb->len );
8088c2ecf20Sopenharmony_ci	}
8098c2ecf20Sopenharmony_ci
8108c2ecf20Sopenharmony_ci	/* We're not prepared for the int until the last flags are set/reset. And
8118c2ecf20Sopenharmony_ci	 * the int may happen already after setting the OWN_CHIP... */
8128c2ecf20Sopenharmony_ci	spin_lock_irqsave (&lp->devlock, flags);
8138c2ecf20Sopenharmony_ci
8148c2ecf20Sopenharmony_ci	/* Mask to ring buffer boundary. */
8158c2ecf20Sopenharmony_ci	entry = lp->cur_tx & TX_RING_MOD_MASK;
8168c2ecf20Sopenharmony_ci	head  = &(MEM->tx_head[entry]);
8178c2ecf20Sopenharmony_ci
8188c2ecf20Sopenharmony_ci	/* Caution: the write order is important here, set the "ownership" bits
8198c2ecf20Sopenharmony_ci	 * last.
8208c2ecf20Sopenharmony_ci	 */
8218c2ecf20Sopenharmony_ci
8228c2ecf20Sopenharmony_ci
8238c2ecf20Sopenharmony_ci	head->length = -len;
8248c2ecf20Sopenharmony_ci	head->misc = 0;
8258c2ecf20Sopenharmony_ci	lp->memcpy_f( PKTBUF_ADDR(head), (void *)skb->data, skb->len );
8268c2ecf20Sopenharmony_ci	head->flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP;
8278c2ecf20Sopenharmony_ci	dev->stats.tx_bytes += skb->len;
8288c2ecf20Sopenharmony_ci	dev_consume_skb_irq(skb);
8298c2ecf20Sopenharmony_ci	lp->cur_tx++;
8308c2ecf20Sopenharmony_ci	while( lp->cur_tx >= TX_RING_SIZE && lp->dirty_tx >= TX_RING_SIZE ) {
8318c2ecf20Sopenharmony_ci		lp->cur_tx -= TX_RING_SIZE;
8328c2ecf20Sopenharmony_ci		lp->dirty_tx -= TX_RING_SIZE;
8338c2ecf20Sopenharmony_ci	}
8348c2ecf20Sopenharmony_ci
8358c2ecf20Sopenharmony_ci	/* Trigger an immediate send poll. */
8368c2ecf20Sopenharmony_ci	DREG = CSR0_INEA | CSR0_TDMD;
8378c2ecf20Sopenharmony_ci
8388c2ecf20Sopenharmony_ci	if ((MEM->tx_head[(entry+1) & TX_RING_MOD_MASK].flag & TMD1_OWN) ==
8398c2ecf20Sopenharmony_ci		TMD1_OWN_HOST)
8408c2ecf20Sopenharmony_ci		netif_start_queue (dev);
8418c2ecf20Sopenharmony_ci	else
8428c2ecf20Sopenharmony_ci		lp->tx_full = 1;
8438c2ecf20Sopenharmony_ci	spin_unlock_irqrestore (&lp->devlock, flags);
8448c2ecf20Sopenharmony_ci
8458c2ecf20Sopenharmony_ci	return NETDEV_TX_OK;
8468c2ecf20Sopenharmony_ci}
8478c2ecf20Sopenharmony_ci
8488c2ecf20Sopenharmony_ci/* The LANCE interrupt handler. */
8498c2ecf20Sopenharmony_ci
8508c2ecf20Sopenharmony_cistatic irqreturn_t lance_interrupt( int irq, void *dev_id )
8518c2ecf20Sopenharmony_ci{
8528c2ecf20Sopenharmony_ci	struct net_device *dev = dev_id;
8538c2ecf20Sopenharmony_ci	struct lance_private *lp;
8548c2ecf20Sopenharmony_ci	struct lance_ioreg	 *IO;
8558c2ecf20Sopenharmony_ci	int csr0, boguscnt = 10;
8568c2ecf20Sopenharmony_ci	int handled = 0;
8578c2ecf20Sopenharmony_ci
8588c2ecf20Sopenharmony_ci	if (dev == NULL) {
8598c2ecf20Sopenharmony_ci		DPRINTK( 1, ( "lance_interrupt(): interrupt for unknown device.\n" ));
8608c2ecf20Sopenharmony_ci		return IRQ_NONE;
8618c2ecf20Sopenharmony_ci	}
8628c2ecf20Sopenharmony_ci
8638c2ecf20Sopenharmony_ci	lp = netdev_priv(dev);
8648c2ecf20Sopenharmony_ci	IO = lp->iobase;
8658c2ecf20Sopenharmony_ci	spin_lock (&lp->devlock);
8668c2ecf20Sopenharmony_ci
8678c2ecf20Sopenharmony_ci	AREG = CSR0;
8688c2ecf20Sopenharmony_ci
8698c2ecf20Sopenharmony_ci	while( ((csr0 = DREG) & (CSR0_ERR | CSR0_TINT | CSR0_RINT)) &&
8708c2ecf20Sopenharmony_ci		   --boguscnt >= 0) {
8718c2ecf20Sopenharmony_ci		handled = 1;
8728c2ecf20Sopenharmony_ci		/* Acknowledge all of the current interrupt sources ASAP. */
8738c2ecf20Sopenharmony_ci		DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP |
8748c2ecf20Sopenharmony_ci									CSR0_TDMD | CSR0_INEA);
8758c2ecf20Sopenharmony_ci
8768c2ecf20Sopenharmony_ci		DPRINTK( 2, ( "%s: interrupt  csr0=%04x new csr=%04x.\n",
8778c2ecf20Sopenharmony_ci					  dev->name, csr0, DREG ));
8788c2ecf20Sopenharmony_ci
8798c2ecf20Sopenharmony_ci		if (csr0 & CSR0_RINT)			/* Rx interrupt */
8808c2ecf20Sopenharmony_ci			lance_rx( dev );
8818c2ecf20Sopenharmony_ci
8828c2ecf20Sopenharmony_ci		if (csr0 & CSR0_TINT) {			/* Tx-done interrupt */
8838c2ecf20Sopenharmony_ci			int dirty_tx = lp->dirty_tx;
8848c2ecf20Sopenharmony_ci
8858c2ecf20Sopenharmony_ci			while( dirty_tx < lp->cur_tx) {
8868c2ecf20Sopenharmony_ci				int entry = dirty_tx & TX_RING_MOD_MASK;
8878c2ecf20Sopenharmony_ci				int status = MEM->tx_head[entry].flag;
8888c2ecf20Sopenharmony_ci
8898c2ecf20Sopenharmony_ci				if (status & TMD1_OWN_CHIP)
8908c2ecf20Sopenharmony_ci					break;			/* It still hasn't been Txed */
8918c2ecf20Sopenharmony_ci
8928c2ecf20Sopenharmony_ci				MEM->tx_head[entry].flag = 0;
8938c2ecf20Sopenharmony_ci
8948c2ecf20Sopenharmony_ci				if (status & TMD1_ERR) {
8958c2ecf20Sopenharmony_ci					/* There was an major error, log it. */
8968c2ecf20Sopenharmony_ci					int err_status = MEM->tx_head[entry].misc;
8978c2ecf20Sopenharmony_ci					dev->stats.tx_errors++;
8988c2ecf20Sopenharmony_ci					if (err_status & TMD3_RTRY) dev->stats.tx_aborted_errors++;
8998c2ecf20Sopenharmony_ci					if (err_status & TMD3_LCAR) dev->stats.tx_carrier_errors++;
9008c2ecf20Sopenharmony_ci					if (err_status & TMD3_LCOL) dev->stats.tx_window_errors++;
9018c2ecf20Sopenharmony_ci					if (err_status & TMD3_UFLO) {
9028c2ecf20Sopenharmony_ci						/* Ackk!  On FIFO errors the Tx unit is turned off! */
9038c2ecf20Sopenharmony_ci						dev->stats.tx_fifo_errors++;
9048c2ecf20Sopenharmony_ci						/* Remove this verbosity later! */
9058c2ecf20Sopenharmony_ci						DPRINTK( 1, ( "%s: Tx FIFO error! Status %04x\n",
9068c2ecf20Sopenharmony_ci									  dev->name, csr0 ));
9078c2ecf20Sopenharmony_ci						/* Restart the chip. */
9088c2ecf20Sopenharmony_ci						DREG = CSR0_STRT;
9098c2ecf20Sopenharmony_ci					}
9108c2ecf20Sopenharmony_ci				} else {
9118c2ecf20Sopenharmony_ci					if (status & (TMD1_MORE | TMD1_ONE | TMD1_DEF))
9128c2ecf20Sopenharmony_ci						dev->stats.collisions++;
9138c2ecf20Sopenharmony_ci					dev->stats.tx_packets++;
9148c2ecf20Sopenharmony_ci				}
9158c2ecf20Sopenharmony_ci
9168c2ecf20Sopenharmony_ci				/* XXX MSch: free skb?? */
9178c2ecf20Sopenharmony_ci				dirty_tx++;
9188c2ecf20Sopenharmony_ci			}
9198c2ecf20Sopenharmony_ci
9208c2ecf20Sopenharmony_ci#ifndef final_version
9218c2ecf20Sopenharmony_ci			if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
9228c2ecf20Sopenharmony_ci				DPRINTK( 0, ( "out-of-sync dirty pointer,"
9238c2ecf20Sopenharmony_ci							  " %d vs. %d, full=%ld.\n",
9248c2ecf20Sopenharmony_ci							  dirty_tx, lp->cur_tx, lp->tx_full ));
9258c2ecf20Sopenharmony_ci				dirty_tx += TX_RING_SIZE;
9268c2ecf20Sopenharmony_ci			}
9278c2ecf20Sopenharmony_ci#endif
9288c2ecf20Sopenharmony_ci
9298c2ecf20Sopenharmony_ci			if (lp->tx_full && (netif_queue_stopped(dev)) &&
9308c2ecf20Sopenharmony_ci				dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) {
9318c2ecf20Sopenharmony_ci				/* The ring is no longer full, clear tbusy. */
9328c2ecf20Sopenharmony_ci				lp->tx_full = 0;
9338c2ecf20Sopenharmony_ci				netif_wake_queue (dev);
9348c2ecf20Sopenharmony_ci			}
9358c2ecf20Sopenharmony_ci
9368c2ecf20Sopenharmony_ci			lp->dirty_tx = dirty_tx;
9378c2ecf20Sopenharmony_ci		}
9388c2ecf20Sopenharmony_ci
9398c2ecf20Sopenharmony_ci		/* Log misc errors. */
9408c2ecf20Sopenharmony_ci		if (csr0 & CSR0_BABL) dev->stats.tx_errors++; /* Tx babble. */
9418c2ecf20Sopenharmony_ci		if (csr0 & CSR0_MISS) dev->stats.rx_errors++; /* Missed a Rx frame. */
9428c2ecf20Sopenharmony_ci		if (csr0 & CSR0_MERR) {
9438c2ecf20Sopenharmony_ci			DPRINTK( 1, ( "%s: Bus master arbitration failure (?!?), "
9448c2ecf20Sopenharmony_ci						  "status %04x.\n", dev->name, csr0 ));
9458c2ecf20Sopenharmony_ci			/* Restart the chip. */
9468c2ecf20Sopenharmony_ci			DREG = CSR0_STRT;
9478c2ecf20Sopenharmony_ci		}
9488c2ecf20Sopenharmony_ci	}
9498c2ecf20Sopenharmony_ci
9508c2ecf20Sopenharmony_ci    /* Clear any other interrupt, and set interrupt enable. */
9518c2ecf20Sopenharmony_ci	DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR |
9528c2ecf20Sopenharmony_ci		   CSR0_IDON | CSR0_INEA;
9538c2ecf20Sopenharmony_ci
9548c2ecf20Sopenharmony_ci	DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n",
9558c2ecf20Sopenharmony_ci				  dev->name, DREG ));
9568c2ecf20Sopenharmony_ci
9578c2ecf20Sopenharmony_ci	spin_unlock (&lp->devlock);
9588c2ecf20Sopenharmony_ci	return IRQ_RETVAL(handled);
9598c2ecf20Sopenharmony_ci}
9608c2ecf20Sopenharmony_ci
9618c2ecf20Sopenharmony_ci
9628c2ecf20Sopenharmony_cistatic int lance_rx( struct net_device *dev )
9638c2ecf20Sopenharmony_ci{
9648c2ecf20Sopenharmony_ci	struct lance_private *lp = netdev_priv(dev);
9658c2ecf20Sopenharmony_ci	int entry = lp->cur_rx & RX_RING_MOD_MASK;
9668c2ecf20Sopenharmony_ci	int i;
9678c2ecf20Sopenharmony_ci
9688c2ecf20Sopenharmony_ci	DPRINTK( 2, ( "%s: rx int, flag=%04x\n", dev->name,
9698c2ecf20Sopenharmony_ci				  MEM->rx_head[entry].flag ));
9708c2ecf20Sopenharmony_ci
9718c2ecf20Sopenharmony_ci	/* If we own the next entry, it's a new packet. Send it up. */
9728c2ecf20Sopenharmony_ci	while( (MEM->rx_head[entry].flag & RMD1_OWN) == RMD1_OWN_HOST ) {
9738c2ecf20Sopenharmony_ci		struct lance_rx_head *head = &(MEM->rx_head[entry]);
9748c2ecf20Sopenharmony_ci		int status = head->flag;
9758c2ecf20Sopenharmony_ci
9768c2ecf20Sopenharmony_ci		if (status != (RMD1_ENP|RMD1_STP)) {		/* There was an error. */
9778c2ecf20Sopenharmony_ci			/* There is a tricky error noted by John Murphy,
9788c2ecf20Sopenharmony_ci			   <murf@perftech.com> to Russ Nelson: Even with full-sized
9798c2ecf20Sopenharmony_ci			   buffers it's possible for a jabber packet to use two
9808c2ecf20Sopenharmony_ci			   buffers, with only the last correctly noting the error. */
9818c2ecf20Sopenharmony_ci			if (status & RMD1_ENP)	/* Only count a general error at the */
9828c2ecf20Sopenharmony_ci				dev->stats.rx_errors++; /* end of a packet.*/
9838c2ecf20Sopenharmony_ci			if (status & RMD1_FRAM) dev->stats.rx_frame_errors++;
9848c2ecf20Sopenharmony_ci			if (status & RMD1_OFLO) dev->stats.rx_over_errors++;
9858c2ecf20Sopenharmony_ci			if (status & RMD1_CRC) dev->stats.rx_crc_errors++;
9868c2ecf20Sopenharmony_ci			if (status & RMD1_BUFF) dev->stats.rx_fifo_errors++;
9878c2ecf20Sopenharmony_ci			head->flag &= (RMD1_ENP|RMD1_STP);
9888c2ecf20Sopenharmony_ci		} else {
9898c2ecf20Sopenharmony_ci			/* Malloc up new buffer, compatible with net-3. */
9908c2ecf20Sopenharmony_ci			short pkt_len = head->msg_length & 0xfff;
9918c2ecf20Sopenharmony_ci			struct sk_buff *skb;
9928c2ecf20Sopenharmony_ci
9938c2ecf20Sopenharmony_ci			if (pkt_len < 60) {
9948c2ecf20Sopenharmony_ci				printk( "%s: Runt packet!\n", dev->name );
9958c2ecf20Sopenharmony_ci				dev->stats.rx_errors++;
9968c2ecf20Sopenharmony_ci			}
9978c2ecf20Sopenharmony_ci			else {
9988c2ecf20Sopenharmony_ci				skb = netdev_alloc_skb(dev, pkt_len + 2);
9998c2ecf20Sopenharmony_ci				if (skb == NULL) {
10008c2ecf20Sopenharmony_ci					for( i = 0; i < RX_RING_SIZE; i++ )
10018c2ecf20Sopenharmony_ci						if (MEM->rx_head[(entry+i) & RX_RING_MOD_MASK].flag &
10028c2ecf20Sopenharmony_ci							RMD1_OWN_CHIP)
10038c2ecf20Sopenharmony_ci							break;
10048c2ecf20Sopenharmony_ci
10058c2ecf20Sopenharmony_ci					if (i > RX_RING_SIZE - 2) {
10068c2ecf20Sopenharmony_ci						dev->stats.rx_dropped++;
10078c2ecf20Sopenharmony_ci						head->flag |= RMD1_OWN_CHIP;
10088c2ecf20Sopenharmony_ci						lp->cur_rx++;
10098c2ecf20Sopenharmony_ci					}
10108c2ecf20Sopenharmony_ci					break;
10118c2ecf20Sopenharmony_ci				}
10128c2ecf20Sopenharmony_ci
10138c2ecf20Sopenharmony_ci				if (lance_debug >= 3) {
10148c2ecf20Sopenharmony_ci					u_char *data = PKTBUF_ADDR(head);
10158c2ecf20Sopenharmony_ci
10168c2ecf20Sopenharmony_ci					printk(KERN_DEBUG "%s: RX pkt type 0x%04x from %pM to %pM "
10178c2ecf20Sopenharmony_ci						   "data %8ph len %d\n",
10188c2ecf20Sopenharmony_ci						   dev->name, ((u_short *)data)[6],
10198c2ecf20Sopenharmony_ci						   &data[6], data, &data[15], pkt_len);
10208c2ecf20Sopenharmony_ci				}
10218c2ecf20Sopenharmony_ci
10228c2ecf20Sopenharmony_ci				skb_reserve( skb, 2 );	/* 16 byte align */
10238c2ecf20Sopenharmony_ci				skb_put( skb, pkt_len );	/* Make room */
10248c2ecf20Sopenharmony_ci				lp->memcpy_f( skb->data, PKTBUF_ADDR(head), pkt_len );
10258c2ecf20Sopenharmony_ci				skb->protocol = eth_type_trans( skb, dev );
10268c2ecf20Sopenharmony_ci				netif_rx( skb );
10278c2ecf20Sopenharmony_ci				dev->stats.rx_packets++;
10288c2ecf20Sopenharmony_ci				dev->stats.rx_bytes += pkt_len;
10298c2ecf20Sopenharmony_ci			}
10308c2ecf20Sopenharmony_ci		}
10318c2ecf20Sopenharmony_ci
10328c2ecf20Sopenharmony_ci		head->flag |= RMD1_OWN_CHIP;
10338c2ecf20Sopenharmony_ci		entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
10348c2ecf20Sopenharmony_ci	}
10358c2ecf20Sopenharmony_ci	lp->cur_rx &= RX_RING_MOD_MASK;
10368c2ecf20Sopenharmony_ci
10378c2ecf20Sopenharmony_ci	/* From lance.c (Donald Becker): */
10388c2ecf20Sopenharmony_ci	/* We should check that at least two ring entries are free.	 If not,
10398c2ecf20Sopenharmony_ci	   we should free one and mark stats->rx_dropped++. */
10408c2ecf20Sopenharmony_ci
10418c2ecf20Sopenharmony_ci	return 0;
10428c2ecf20Sopenharmony_ci}
10438c2ecf20Sopenharmony_ci
10448c2ecf20Sopenharmony_ci
10458c2ecf20Sopenharmony_cistatic int lance_close( struct net_device *dev )
10468c2ecf20Sopenharmony_ci{
10478c2ecf20Sopenharmony_ci	struct lance_private *lp = netdev_priv(dev);
10488c2ecf20Sopenharmony_ci	struct lance_ioreg	 *IO = lp->iobase;
10498c2ecf20Sopenharmony_ci
10508c2ecf20Sopenharmony_ci	netif_stop_queue (dev);
10518c2ecf20Sopenharmony_ci
10528c2ecf20Sopenharmony_ci	AREG = CSR0;
10538c2ecf20Sopenharmony_ci
10548c2ecf20Sopenharmony_ci	DPRINTK( 2, ( "%s: Shutting down ethercard, status was %2.2x.\n",
10558c2ecf20Sopenharmony_ci				  dev->name, DREG ));
10568c2ecf20Sopenharmony_ci
10578c2ecf20Sopenharmony_ci	/* We stop the LANCE here -- it occasionally polls
10588c2ecf20Sopenharmony_ci	   memory if we don't. */
10598c2ecf20Sopenharmony_ci	DREG = CSR0_STOP;
10608c2ecf20Sopenharmony_ci
10618c2ecf20Sopenharmony_ci	return 0;
10628c2ecf20Sopenharmony_ci}
10638c2ecf20Sopenharmony_ci
10648c2ecf20Sopenharmony_ci
10658c2ecf20Sopenharmony_ci/* Set or clear the multicast filter for this adaptor.
10668c2ecf20Sopenharmony_ci   num_addrs == -1		Promiscuous mode, receive all packets
10678c2ecf20Sopenharmony_ci   num_addrs == 0		Normal mode, clear multicast list
10688c2ecf20Sopenharmony_ci   num_addrs > 0		Multicast mode, receive normal and MC packets, and do
10698c2ecf20Sopenharmony_ci						best-effort filtering.
10708c2ecf20Sopenharmony_ci */
10718c2ecf20Sopenharmony_ci
10728c2ecf20Sopenharmony_cistatic void set_multicast_list( struct net_device *dev )
10738c2ecf20Sopenharmony_ci{
10748c2ecf20Sopenharmony_ci	struct lance_private *lp = netdev_priv(dev);
10758c2ecf20Sopenharmony_ci	struct lance_ioreg	 *IO = lp->iobase;
10768c2ecf20Sopenharmony_ci
10778c2ecf20Sopenharmony_ci	if (netif_running(dev))
10788c2ecf20Sopenharmony_ci		/* Only possible if board is already started */
10798c2ecf20Sopenharmony_ci		return;
10808c2ecf20Sopenharmony_ci
10818c2ecf20Sopenharmony_ci	/* We take the simple way out and always enable promiscuous mode. */
10828c2ecf20Sopenharmony_ci	DREG = CSR0_STOP; /* Temporarily stop the lance. */
10838c2ecf20Sopenharmony_ci
10848c2ecf20Sopenharmony_ci	if (dev->flags & IFF_PROMISC) {
10858c2ecf20Sopenharmony_ci		/* Log any net taps. */
10868c2ecf20Sopenharmony_ci		DPRINTK( 2, ( "%s: Promiscuous mode enabled.\n", dev->name ));
10878c2ecf20Sopenharmony_ci		REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */
10888c2ecf20Sopenharmony_ci	} else {
10898c2ecf20Sopenharmony_ci		short multicast_table[4];
10908c2ecf20Sopenharmony_ci		int num_addrs = netdev_mc_count(dev);
10918c2ecf20Sopenharmony_ci		int i;
10928c2ecf20Sopenharmony_ci		/* We don't use the multicast table, but rely on upper-layer
10938c2ecf20Sopenharmony_ci		 * filtering. */
10948c2ecf20Sopenharmony_ci		memset( multicast_table, (num_addrs == 0) ? 0 : -1,
10958c2ecf20Sopenharmony_ci				sizeof(multicast_table) );
10968c2ecf20Sopenharmony_ci		for( i = 0; i < 4; i++ )
10978c2ecf20Sopenharmony_ci			REGA( CSR8+i ) = multicast_table[i];
10988c2ecf20Sopenharmony_ci		REGA( CSR15 ) = 0; /* Unset promiscuous mode */
10998c2ecf20Sopenharmony_ci	}
11008c2ecf20Sopenharmony_ci
11018c2ecf20Sopenharmony_ci	/*
11028c2ecf20Sopenharmony_ci	 * Always set BSWP after a STOP as STOP puts it back into
11038c2ecf20Sopenharmony_ci	 * little endian mode.
11048c2ecf20Sopenharmony_ci	 */
11058c2ecf20Sopenharmony_ci	REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
11068c2ecf20Sopenharmony_ci
11078c2ecf20Sopenharmony_ci	/* Resume normal operation and reset AREG to CSR0 */
11088c2ecf20Sopenharmony_ci	REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT;
11098c2ecf20Sopenharmony_ci}
11108c2ecf20Sopenharmony_ci
11118c2ecf20Sopenharmony_ci
11128c2ecf20Sopenharmony_ci/* This is needed for old RieblCards and possible for new RieblCards */
11138c2ecf20Sopenharmony_ci
11148c2ecf20Sopenharmony_cistatic int lance_set_mac_address( struct net_device *dev, void *addr )
11158c2ecf20Sopenharmony_ci{
11168c2ecf20Sopenharmony_ci	struct lance_private *lp = netdev_priv(dev);
11178c2ecf20Sopenharmony_ci	struct sockaddr *saddr = addr;
11188c2ecf20Sopenharmony_ci	int i;
11198c2ecf20Sopenharmony_ci
11208c2ecf20Sopenharmony_ci	if (lp->cardtype != OLD_RIEBL && lp->cardtype != NEW_RIEBL)
11218c2ecf20Sopenharmony_ci		return -EOPNOTSUPP;
11228c2ecf20Sopenharmony_ci
11238c2ecf20Sopenharmony_ci	if (netif_running(dev)) {
11248c2ecf20Sopenharmony_ci		/* Only possible while card isn't started */
11258c2ecf20Sopenharmony_ci		DPRINTK( 1, ( "%s: hwaddr can be set only while card isn't open.\n",
11268c2ecf20Sopenharmony_ci					  dev->name ));
11278c2ecf20Sopenharmony_ci		return -EIO;
11288c2ecf20Sopenharmony_ci	}
11298c2ecf20Sopenharmony_ci
11308c2ecf20Sopenharmony_ci	memcpy( dev->dev_addr, saddr->sa_data, dev->addr_len );
11318c2ecf20Sopenharmony_ci	for( i = 0; i < 6; i++ )
11328c2ecf20Sopenharmony_ci		MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */
11338c2ecf20Sopenharmony_ci	lp->memcpy_f( RIEBL_HWADDR_ADDR, dev->dev_addr, 6 );
11348c2ecf20Sopenharmony_ci	/* set also the magic for future sessions */
11358c2ecf20Sopenharmony_ci	*RIEBL_MAGIC_ADDR = RIEBL_MAGIC;
11368c2ecf20Sopenharmony_ci
11378c2ecf20Sopenharmony_ci	return 0;
11388c2ecf20Sopenharmony_ci}
11398c2ecf20Sopenharmony_ci
11408c2ecf20Sopenharmony_ci
11418c2ecf20Sopenharmony_ci#ifdef MODULE
11428c2ecf20Sopenharmony_cistatic struct net_device *atarilance_dev;
11438c2ecf20Sopenharmony_ci
11448c2ecf20Sopenharmony_cistatic int __init atarilance_module_init(void)
11458c2ecf20Sopenharmony_ci{
11468c2ecf20Sopenharmony_ci	atarilance_dev = atarilance_probe(-1);
11478c2ecf20Sopenharmony_ci	return PTR_ERR_OR_ZERO(atarilance_dev);
11488c2ecf20Sopenharmony_ci}
11498c2ecf20Sopenharmony_ci
11508c2ecf20Sopenharmony_cistatic void __exit atarilance_module_exit(void)
11518c2ecf20Sopenharmony_ci{
11528c2ecf20Sopenharmony_ci	unregister_netdev(atarilance_dev);
11538c2ecf20Sopenharmony_ci	free_irq(atarilance_dev->irq, atarilance_dev);
11548c2ecf20Sopenharmony_ci	free_netdev(atarilance_dev);
11558c2ecf20Sopenharmony_ci}
11568c2ecf20Sopenharmony_cimodule_init(atarilance_module_init);
11578c2ecf20Sopenharmony_cimodule_exit(atarilance_module_exit);
11588c2ecf20Sopenharmony_ci#endif /* MODULE */
11598c2ecf20Sopenharmony_ci
11608c2ecf20Sopenharmony_ci
11618c2ecf20Sopenharmony_ci/*
11628c2ecf20Sopenharmony_ci * Local variables:
11638c2ecf20Sopenharmony_ci *  c-indent-level: 4
11648c2ecf20Sopenharmony_ci *  tab-width: 4
11658c2ecf20Sopenharmony_ci * End:
11668c2ecf20Sopenharmony_ci */
1167