Searched refs:CLK_TOP_DXCC_SEL (Results 1 - 12 of 12) sorted by relevance
| /kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt6765-clk.h | 152 #define CLK_TOP_DXCC_SEL 117 macro
|
| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| H A D | mt6765-clk.h | 152 #define CLK_TOP_DXCC_SEL 117 macro
|
| /kernel/linux/linux-6.6/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 94 #define CLK_TOP_DXCC_SEL 84 macro
|
| H A D | mt6765-clk.h | 152 #define CLK_TOP_DXCC_SEL 117 macro
|
| H A D | mt8192-clk.h | 54 #define CLK_TOP_DXCC_SEL 42 macro
|
| /kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 94 #define CLK_TOP_DXCC_SEL 84 macro
|
| H A D | mt6765-clk.h | 152 #define CLK_TOP_DXCC_SEL 117 macro
|
| H A D | mt8192-clk.h | 54 #define CLK_TOP_DXCC_SEL 42 macro
|
| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| H A D | clk-mt6765.c | 438 MUX_GATE_CLR_SET_UPD(CLK_TOP_DXCC_SEL, "dxcc_sel", dxcc_parents,
|
| H A D | clk-mt8365.c | 475 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_DXCC_SEL, "dxcc_sel", dxcc_parents,
|
| H A D | clk-mt8192.c | 646 MUX_GATE_CLR_SET_UPD(CLK_TOP_DXCC_SEL, "dxcc_sel",
|
| /kernel/linux/linux-5.10/drivers/clk/mediatek/ |
| H A D | clk-mt6765.c | 435 MUX_GATE_CLR_SET_UPD(CLK_TOP_DXCC_SEL, "dxcc_sel", dxcc_parents,
|
Completed in 14 milliseconds